xref: /aosp_15_r20/external/XNNPACK/src/f32-igemm/gen/6x8s4-wasmsimd.c (revision 4bdc94577ba0e567308109d787f7fec7b531ce36)
1 // Auto-generated file. Do not edit!
2 //   Template: src/f32-igemm/wasmsimd-s4.c.in
3 //   Generator: tools/xngen
4 //
5 // Copyright 2020 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9 
10 #include <assert.h>
11 
12 #include <wasm_simd128.h>
13 
14 #include <xnnpack/igemm.h>
15 
16 
xnn_f32_igemm_ukernel_6x8s4__wasmsimd(size_t mr,size_t nc,size_t kc,size_t ks,const float ** restrict a,const float * restrict w,float * restrict c,size_t cm_stride,size_t cn_stride,size_t a_offset,const float * zero,const union xnn_f32_default_params params[restrict XNN_MIN_ELEMENTS (1)])17 void xnn_f32_igemm_ukernel_6x8s4__wasmsimd(
18     size_t mr,
19     size_t nc,
20     size_t kc,
21     size_t ks,
22     const float**restrict a,
23     const float*restrict w,
24     float*restrict c,
25     size_t cm_stride,
26     size_t cn_stride,
27     size_t a_offset,
28     const float* zero,
29     const union xnn_f32_default_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
30 {
31   assert(mr != 0);
32   assert(mr <= 6);
33   assert(nc != 0);
34   assert(kc != 0);
35   assert(kc % sizeof(float) == 0);
36   assert(ks != 0);
37   assert(ks % (6 * sizeof(void*)) == 0);
38   assert(a_offset % sizeof(float) == 0);
39   assert(a != NULL);
40   assert(w != NULL);
41   assert(c != NULL);
42 
43   float* c0 = c;
44   float* c1 = (float*) ((uintptr_t) c0 + cm_stride);
45   if XNN_UNPREDICTABLE(mr < 2) {
46     c1 = c0;
47   }
48   float* c2 = (float*) ((uintptr_t) c1 + cm_stride);
49   if XNN_UNPREDICTABLE(mr <= 2) {
50     c2 = c1;
51   }
52   float* c3 = (float*) ((uintptr_t) c2 + cm_stride);
53   if XNN_UNPREDICTABLE(mr < 4) {
54     c3 = c2;
55   }
56   float* c4 = (float*) ((uintptr_t) c3 + cm_stride);
57   if XNN_UNPREDICTABLE(mr <= 4) {
58     c4 = c3;
59   }
60   float* c5 = (float*) ((uintptr_t) c4 + cm_stride);
61   if XNN_UNPREDICTABLE(mr != 6) {
62     c5 = c4;
63   }
64 
65   do {
66     v128_t vacc0x0123 = wasm_v128_load(w);
67     v128_t vacc0x4567 = wasm_v128_load(w + 4);
68     v128_t vacc1x0123 = vacc0x0123;
69     v128_t vacc1x4567 = vacc0x4567;
70     v128_t vacc2x0123 = vacc0x0123;
71     v128_t vacc2x4567 = vacc0x4567;
72     v128_t vacc3x0123 = vacc0x0123;
73     v128_t vacc3x4567 = vacc0x4567;
74     v128_t vacc4x0123 = vacc0x0123;
75     v128_t vacc4x4567 = vacc0x4567;
76     v128_t vacc5x0123 = vacc0x0123;
77     v128_t vacc5x4567 = vacc0x4567;
78     w += 8;
79 
80     size_t p = ks;
81     do {
82       const float* restrict a0 = a[0];
83       assert(a0 != NULL);
84       if XNN_UNPREDICTABLE(a0 != zero) {
85         a0 = (const float*) ((uintptr_t) a0 + a_offset);
86       }
87       const float* restrict a1 = a[1];
88       assert(a1 != NULL);
89       if XNN_UNPREDICTABLE(a1 != zero) {
90         a1 = (const float*) ((uintptr_t) a1 + a_offset);
91       }
92       const float* restrict a2 = a[2];
93       assert(a2 != NULL);
94       if XNN_UNPREDICTABLE(a2 != zero) {
95         a2 = (const float*) ((uintptr_t) a2 + a_offset);
96       }
97       const float* restrict a3 = a[3];
98       assert(a3 != NULL);
99       if XNN_UNPREDICTABLE(a3 != zero) {
100         a3 = (const float*) ((uintptr_t) a3 + a_offset);
101       }
102       const float* restrict a4 = a[4];
103       assert(a4 != NULL);
104       if XNN_UNPREDICTABLE(a4 != zero) {
105         a4 = (const float*) ((uintptr_t) a4 + a_offset);
106       }
107       const float* restrict a5 = a[5];
108       assert(a5 != NULL);
109       if XNN_UNPREDICTABLE(a5 != zero) {
110         a5 = (const float*) ((uintptr_t) a5 + a_offset);
111       }
112       a += 6;
113 
114       size_t k = kc;
115       while (k >= 4 * sizeof(float)) {
116         v128_t va0 = wasm_v128_load(a0);
117         a0 += 4;
118         v128_t va1 = wasm_v128_load(a1);
119         a1 += 4;
120         v128_t va2 = wasm_v128_load(a2);
121         a2 += 4;
122         v128_t va3 = wasm_v128_load(a3);
123         a3 += 4;
124         v128_t va4 = wasm_v128_load(a4);
125         a4 += 4;
126         v128_t va5 = wasm_v128_load(a5);
127         a5 += 4;
128 
129 
130         const v128_t vb0123c0 = wasm_v128_load(w + 0);
131         const v128_t vb4567c0 = wasm_v128_load(w + 4);
132 
133         vacc0x0123 = wasm_f32x4_add(vacc0x0123, wasm_f32x4_mul(va0, vb0123c0));
134         vacc1x0123 = wasm_f32x4_add(vacc1x0123, wasm_f32x4_mul(va1, vb0123c0));
135         vacc2x0123 = wasm_f32x4_add(vacc2x0123, wasm_f32x4_mul(va2, vb0123c0));
136         vacc3x0123 = wasm_f32x4_add(vacc3x0123, wasm_f32x4_mul(va3, vb0123c0));
137         vacc4x0123 = wasm_f32x4_add(vacc4x0123, wasm_f32x4_mul(va4, vb0123c0));
138         vacc5x0123 = wasm_f32x4_add(vacc5x0123, wasm_f32x4_mul(va5, vb0123c0));
139         vacc0x4567 = wasm_f32x4_add(vacc0x4567, wasm_f32x4_mul(va0, vb4567c0));
140         vacc1x4567 = wasm_f32x4_add(vacc1x4567, wasm_f32x4_mul(va1, vb4567c0));
141         vacc2x4567 = wasm_f32x4_add(vacc2x4567, wasm_f32x4_mul(va2, vb4567c0));
142         vacc3x4567 = wasm_f32x4_add(vacc3x4567, wasm_f32x4_mul(va3, vb4567c0));
143         vacc4x4567 = wasm_f32x4_add(vacc4x4567, wasm_f32x4_mul(va4, vb4567c0));
144         vacc5x4567 = wasm_f32x4_add(vacc5x4567, wasm_f32x4_mul(va5, vb4567c0));
145 
146         va0 = wasm_v32x4_shuffle(va0, va0, 1, 2, 3, 0);
147         va1 = wasm_v32x4_shuffle(va1, va1, 1, 2, 3, 0);
148         va2 = wasm_v32x4_shuffle(va2, va2, 1, 2, 3, 0);
149         va3 = wasm_v32x4_shuffle(va3, va3, 1, 2, 3, 0);
150         va4 = wasm_v32x4_shuffle(va4, va4, 1, 2, 3, 0);
151         va5 = wasm_v32x4_shuffle(va5, va5, 1, 2, 3, 0);
152 
153         const v128_t vb0123c1 = wasm_v128_load(w + 8);
154         const v128_t vb4567c1 = wasm_v128_load(w + 12);
155 
156         vacc0x0123 = wasm_f32x4_add(vacc0x0123, wasm_f32x4_mul(va0, vb0123c1));
157         vacc1x0123 = wasm_f32x4_add(vacc1x0123, wasm_f32x4_mul(va1, vb0123c1));
158         vacc2x0123 = wasm_f32x4_add(vacc2x0123, wasm_f32x4_mul(va2, vb0123c1));
159         vacc3x0123 = wasm_f32x4_add(vacc3x0123, wasm_f32x4_mul(va3, vb0123c1));
160         vacc4x0123 = wasm_f32x4_add(vacc4x0123, wasm_f32x4_mul(va4, vb0123c1));
161         vacc5x0123 = wasm_f32x4_add(vacc5x0123, wasm_f32x4_mul(va5, vb0123c1));
162         vacc0x4567 = wasm_f32x4_add(vacc0x4567, wasm_f32x4_mul(va0, vb4567c1));
163         vacc1x4567 = wasm_f32x4_add(vacc1x4567, wasm_f32x4_mul(va1, vb4567c1));
164         vacc2x4567 = wasm_f32x4_add(vacc2x4567, wasm_f32x4_mul(va2, vb4567c1));
165         vacc3x4567 = wasm_f32x4_add(vacc3x4567, wasm_f32x4_mul(va3, vb4567c1));
166         vacc4x4567 = wasm_f32x4_add(vacc4x4567, wasm_f32x4_mul(va4, vb4567c1));
167         vacc5x4567 = wasm_f32x4_add(vacc5x4567, wasm_f32x4_mul(va5, vb4567c1));
168 
169         va0 = wasm_v32x4_shuffle(va0, va0, 1, 2, 3, 0);
170         va1 = wasm_v32x4_shuffle(va1, va1, 1, 2, 3, 0);
171         va2 = wasm_v32x4_shuffle(va2, va2, 1, 2, 3, 0);
172         va3 = wasm_v32x4_shuffle(va3, va3, 1, 2, 3, 0);
173         va4 = wasm_v32x4_shuffle(va4, va4, 1, 2, 3, 0);
174         va5 = wasm_v32x4_shuffle(va5, va5, 1, 2, 3, 0);
175 
176         const v128_t vb0123c2 = wasm_v128_load(w + 16);
177         const v128_t vb4567c2 = wasm_v128_load(w + 20);
178 
179         vacc0x0123 = wasm_f32x4_add(vacc0x0123, wasm_f32x4_mul(va0, vb0123c2));
180         vacc1x0123 = wasm_f32x4_add(vacc1x0123, wasm_f32x4_mul(va1, vb0123c2));
181         vacc2x0123 = wasm_f32x4_add(vacc2x0123, wasm_f32x4_mul(va2, vb0123c2));
182         vacc3x0123 = wasm_f32x4_add(vacc3x0123, wasm_f32x4_mul(va3, vb0123c2));
183         vacc4x0123 = wasm_f32x4_add(vacc4x0123, wasm_f32x4_mul(va4, vb0123c2));
184         vacc5x0123 = wasm_f32x4_add(vacc5x0123, wasm_f32x4_mul(va5, vb0123c2));
185         vacc0x4567 = wasm_f32x4_add(vacc0x4567, wasm_f32x4_mul(va0, vb4567c2));
186         vacc1x4567 = wasm_f32x4_add(vacc1x4567, wasm_f32x4_mul(va1, vb4567c2));
187         vacc2x4567 = wasm_f32x4_add(vacc2x4567, wasm_f32x4_mul(va2, vb4567c2));
188         vacc3x4567 = wasm_f32x4_add(vacc3x4567, wasm_f32x4_mul(va3, vb4567c2));
189         vacc4x4567 = wasm_f32x4_add(vacc4x4567, wasm_f32x4_mul(va4, vb4567c2));
190         vacc5x4567 = wasm_f32x4_add(vacc5x4567, wasm_f32x4_mul(va5, vb4567c2));
191 
192         va0 = wasm_v32x4_shuffle(va0, va0, 1, 2, 3, 0);
193         va1 = wasm_v32x4_shuffle(va1, va1, 1, 2, 3, 0);
194         va2 = wasm_v32x4_shuffle(va2, va2, 1, 2, 3, 0);
195         va3 = wasm_v32x4_shuffle(va3, va3, 1, 2, 3, 0);
196         va4 = wasm_v32x4_shuffle(va4, va4, 1, 2, 3, 0);
197         va5 = wasm_v32x4_shuffle(va5, va5, 1, 2, 3, 0);
198 
199         const v128_t vb0123c3 = wasm_v128_load(w + 24);
200         const v128_t vb4567c3 = wasm_v128_load(w + 28);
201 
202         vacc0x0123 = wasm_f32x4_add(vacc0x0123, wasm_f32x4_mul(va0, vb0123c3));
203         vacc1x0123 = wasm_f32x4_add(vacc1x0123, wasm_f32x4_mul(va1, vb0123c3));
204         vacc2x0123 = wasm_f32x4_add(vacc2x0123, wasm_f32x4_mul(va2, vb0123c3));
205         vacc3x0123 = wasm_f32x4_add(vacc3x0123, wasm_f32x4_mul(va3, vb0123c3));
206         vacc4x0123 = wasm_f32x4_add(vacc4x0123, wasm_f32x4_mul(va4, vb0123c3));
207         vacc5x0123 = wasm_f32x4_add(vacc5x0123, wasm_f32x4_mul(va5, vb0123c3));
208         vacc0x4567 = wasm_f32x4_add(vacc0x4567, wasm_f32x4_mul(va0, vb4567c3));
209         vacc1x4567 = wasm_f32x4_add(vacc1x4567, wasm_f32x4_mul(va1, vb4567c3));
210         vacc2x4567 = wasm_f32x4_add(vacc2x4567, wasm_f32x4_mul(va2, vb4567c3));
211         vacc3x4567 = wasm_f32x4_add(vacc3x4567, wasm_f32x4_mul(va3, vb4567c3));
212         vacc4x4567 = wasm_f32x4_add(vacc4x4567, wasm_f32x4_mul(va4, vb4567c3));
213         vacc5x4567 = wasm_f32x4_add(vacc5x4567, wasm_f32x4_mul(va5, vb4567c3));
214 
215 
216         w += 32;
217         k -= 4 * sizeof(float);
218       }
219       if XNN_UNLIKELY(k != 0) {
220         v128_t va0 = wasm_v128_load(a0);
221         a0 = (const float*) ((uintptr_t) a0 + k);
222         v128_t va1 = wasm_v128_load(a1);
223         a1 = (const float*) ((uintptr_t) a1 + k);
224         v128_t va2 = wasm_v128_load(a2);
225         a2 = (const float*) ((uintptr_t) a2 + k);
226         v128_t va3 = wasm_v128_load(a3);
227         a3 = (const float*) ((uintptr_t) a3 + k);
228         v128_t va4 = wasm_v128_load(a4);
229         a4 = (const float*) ((uintptr_t) a4 + k);
230         v128_t va5 = wasm_v128_load(a5);
231         a5 = (const float*) ((uintptr_t) a5 + k);
232 
233         const v128_t vzero = wasm_f32x4_const_splat(0.0f);
234 
235         const v128_t vb0123c0 = wasm_v128_load(w + 0);
236         const v128_t vb4567c0 = wasm_v128_load(w + 4);
237 
238         vacc0x0123 = wasm_f32x4_add(vacc0x0123, wasm_f32x4_mul(wasm_v128_andnot(va0, wasm_f32x4_eq(vb0123c0, vzero)), vb0123c0));
239         vacc1x0123 = wasm_f32x4_add(vacc1x0123, wasm_f32x4_mul(wasm_v128_andnot(va1, wasm_f32x4_eq(vb0123c0, vzero)), vb0123c0));
240         vacc2x0123 = wasm_f32x4_add(vacc2x0123, wasm_f32x4_mul(wasm_v128_andnot(va2, wasm_f32x4_eq(vb0123c0, vzero)), vb0123c0));
241         vacc3x0123 = wasm_f32x4_add(vacc3x0123, wasm_f32x4_mul(wasm_v128_andnot(va3, wasm_f32x4_eq(vb0123c0, vzero)), vb0123c0));
242         vacc4x0123 = wasm_f32x4_add(vacc4x0123, wasm_f32x4_mul(wasm_v128_andnot(va4, wasm_f32x4_eq(vb0123c0, vzero)), vb0123c0));
243         vacc5x0123 = wasm_f32x4_add(vacc5x0123, wasm_f32x4_mul(wasm_v128_andnot(va5, wasm_f32x4_eq(vb0123c0, vzero)), vb0123c0));
244         vacc0x4567 = wasm_f32x4_add(vacc0x4567, wasm_f32x4_mul(wasm_v128_andnot(va0, wasm_f32x4_eq(vb4567c0, vzero)), vb4567c0));
245         vacc1x4567 = wasm_f32x4_add(vacc1x4567, wasm_f32x4_mul(wasm_v128_andnot(va1, wasm_f32x4_eq(vb4567c0, vzero)), vb4567c0));
246         vacc2x4567 = wasm_f32x4_add(vacc2x4567, wasm_f32x4_mul(wasm_v128_andnot(va2, wasm_f32x4_eq(vb4567c0, vzero)), vb4567c0));
247         vacc3x4567 = wasm_f32x4_add(vacc3x4567, wasm_f32x4_mul(wasm_v128_andnot(va3, wasm_f32x4_eq(vb4567c0, vzero)), vb4567c0));
248         vacc4x4567 = wasm_f32x4_add(vacc4x4567, wasm_f32x4_mul(wasm_v128_andnot(va4, wasm_f32x4_eq(vb4567c0, vzero)), vb4567c0));
249         vacc5x4567 = wasm_f32x4_add(vacc5x4567, wasm_f32x4_mul(wasm_v128_andnot(va5, wasm_f32x4_eq(vb4567c0, vzero)), vb4567c0));
250 
251         va0 = wasm_v32x4_shuffle(va0, va0, 1, 2, 3, 0);
252         va1 = wasm_v32x4_shuffle(va1, va1, 1, 2, 3, 0);
253         va2 = wasm_v32x4_shuffle(va2, va2, 1, 2, 3, 0);
254         va3 = wasm_v32x4_shuffle(va3, va3, 1, 2, 3, 0);
255         va4 = wasm_v32x4_shuffle(va4, va4, 1, 2, 3, 0);
256         va5 = wasm_v32x4_shuffle(va5, va5, 1, 2, 3, 0);
257 
258         const v128_t vb0123c1 = wasm_v128_load(w + 8);
259         const v128_t vb4567c1 = wasm_v128_load(w + 12);
260 
261         vacc0x0123 = wasm_f32x4_add(vacc0x0123, wasm_f32x4_mul(wasm_v128_andnot(va0, wasm_f32x4_eq(vb0123c1, vzero)), vb0123c1));
262         vacc1x0123 = wasm_f32x4_add(vacc1x0123, wasm_f32x4_mul(wasm_v128_andnot(va1, wasm_f32x4_eq(vb0123c1, vzero)), vb0123c1));
263         vacc2x0123 = wasm_f32x4_add(vacc2x0123, wasm_f32x4_mul(wasm_v128_andnot(va2, wasm_f32x4_eq(vb0123c1, vzero)), vb0123c1));
264         vacc3x0123 = wasm_f32x4_add(vacc3x0123, wasm_f32x4_mul(wasm_v128_andnot(va3, wasm_f32x4_eq(vb0123c1, vzero)), vb0123c1));
265         vacc4x0123 = wasm_f32x4_add(vacc4x0123, wasm_f32x4_mul(wasm_v128_andnot(va4, wasm_f32x4_eq(vb0123c1, vzero)), vb0123c1));
266         vacc5x0123 = wasm_f32x4_add(vacc5x0123, wasm_f32x4_mul(wasm_v128_andnot(va5, wasm_f32x4_eq(vb0123c1, vzero)), vb0123c1));
267         vacc0x4567 = wasm_f32x4_add(vacc0x4567, wasm_f32x4_mul(wasm_v128_andnot(va0, wasm_f32x4_eq(vb4567c1, vzero)), vb4567c1));
268         vacc1x4567 = wasm_f32x4_add(vacc1x4567, wasm_f32x4_mul(wasm_v128_andnot(va1, wasm_f32x4_eq(vb4567c1, vzero)), vb4567c1));
269         vacc2x4567 = wasm_f32x4_add(vacc2x4567, wasm_f32x4_mul(wasm_v128_andnot(va2, wasm_f32x4_eq(vb4567c1, vzero)), vb4567c1));
270         vacc3x4567 = wasm_f32x4_add(vacc3x4567, wasm_f32x4_mul(wasm_v128_andnot(va3, wasm_f32x4_eq(vb4567c1, vzero)), vb4567c1));
271         vacc4x4567 = wasm_f32x4_add(vacc4x4567, wasm_f32x4_mul(wasm_v128_andnot(va4, wasm_f32x4_eq(vb4567c1, vzero)), vb4567c1));
272         vacc5x4567 = wasm_f32x4_add(vacc5x4567, wasm_f32x4_mul(wasm_v128_andnot(va5, wasm_f32x4_eq(vb4567c1, vzero)), vb4567c1));
273 
274         va0 = wasm_v32x4_shuffle(va0, va0, 1, 2, 3, 0);
275         va1 = wasm_v32x4_shuffle(va1, va1, 1, 2, 3, 0);
276         va2 = wasm_v32x4_shuffle(va2, va2, 1, 2, 3, 0);
277         va3 = wasm_v32x4_shuffle(va3, va3, 1, 2, 3, 0);
278         va4 = wasm_v32x4_shuffle(va4, va4, 1, 2, 3, 0);
279         va5 = wasm_v32x4_shuffle(va5, va5, 1, 2, 3, 0);
280 
281         const v128_t vb0123c2 = wasm_v128_load(w + 16);
282         const v128_t vb4567c2 = wasm_v128_load(w + 20);
283 
284         vacc0x0123 = wasm_f32x4_add(vacc0x0123, wasm_f32x4_mul(wasm_v128_andnot(va0, wasm_f32x4_eq(vb0123c2, vzero)), vb0123c2));
285         vacc1x0123 = wasm_f32x4_add(vacc1x0123, wasm_f32x4_mul(wasm_v128_andnot(va1, wasm_f32x4_eq(vb0123c2, vzero)), vb0123c2));
286         vacc2x0123 = wasm_f32x4_add(vacc2x0123, wasm_f32x4_mul(wasm_v128_andnot(va2, wasm_f32x4_eq(vb0123c2, vzero)), vb0123c2));
287         vacc3x0123 = wasm_f32x4_add(vacc3x0123, wasm_f32x4_mul(wasm_v128_andnot(va3, wasm_f32x4_eq(vb0123c2, vzero)), vb0123c2));
288         vacc4x0123 = wasm_f32x4_add(vacc4x0123, wasm_f32x4_mul(wasm_v128_andnot(va4, wasm_f32x4_eq(vb0123c2, vzero)), vb0123c2));
289         vacc5x0123 = wasm_f32x4_add(vacc5x0123, wasm_f32x4_mul(wasm_v128_andnot(va5, wasm_f32x4_eq(vb0123c2, vzero)), vb0123c2));
290         vacc0x4567 = wasm_f32x4_add(vacc0x4567, wasm_f32x4_mul(wasm_v128_andnot(va0, wasm_f32x4_eq(vb4567c2, vzero)), vb4567c2));
291         vacc1x4567 = wasm_f32x4_add(vacc1x4567, wasm_f32x4_mul(wasm_v128_andnot(va1, wasm_f32x4_eq(vb4567c2, vzero)), vb4567c2));
292         vacc2x4567 = wasm_f32x4_add(vacc2x4567, wasm_f32x4_mul(wasm_v128_andnot(va2, wasm_f32x4_eq(vb4567c2, vzero)), vb4567c2));
293         vacc3x4567 = wasm_f32x4_add(vacc3x4567, wasm_f32x4_mul(wasm_v128_andnot(va3, wasm_f32x4_eq(vb4567c2, vzero)), vb4567c2));
294         vacc4x4567 = wasm_f32x4_add(vacc4x4567, wasm_f32x4_mul(wasm_v128_andnot(va4, wasm_f32x4_eq(vb4567c2, vzero)), vb4567c2));
295         vacc5x4567 = wasm_f32x4_add(vacc5x4567, wasm_f32x4_mul(wasm_v128_andnot(va5, wasm_f32x4_eq(vb4567c2, vzero)), vb4567c2));
296 
297         va0 = wasm_v32x4_shuffle(va0, va0, 1, 2, 3, 0);
298         va1 = wasm_v32x4_shuffle(va1, va1, 1, 2, 3, 0);
299         va2 = wasm_v32x4_shuffle(va2, va2, 1, 2, 3, 0);
300         va3 = wasm_v32x4_shuffle(va3, va3, 1, 2, 3, 0);
301         va4 = wasm_v32x4_shuffle(va4, va4, 1, 2, 3, 0);
302         va5 = wasm_v32x4_shuffle(va5, va5, 1, 2, 3, 0);
303 
304         const v128_t vb0123c3 = wasm_v128_load(w + 24);
305         const v128_t vb4567c3 = wasm_v128_load(w + 28);
306 
307         vacc0x0123 = wasm_f32x4_add(vacc0x0123, wasm_f32x4_mul(wasm_v128_andnot(va0, wasm_f32x4_eq(vb0123c3, vzero)), vb0123c3));
308         vacc1x0123 = wasm_f32x4_add(vacc1x0123, wasm_f32x4_mul(wasm_v128_andnot(va1, wasm_f32x4_eq(vb0123c3, vzero)), vb0123c3));
309         vacc2x0123 = wasm_f32x4_add(vacc2x0123, wasm_f32x4_mul(wasm_v128_andnot(va2, wasm_f32x4_eq(vb0123c3, vzero)), vb0123c3));
310         vacc3x0123 = wasm_f32x4_add(vacc3x0123, wasm_f32x4_mul(wasm_v128_andnot(va3, wasm_f32x4_eq(vb0123c3, vzero)), vb0123c3));
311         vacc4x0123 = wasm_f32x4_add(vacc4x0123, wasm_f32x4_mul(wasm_v128_andnot(va4, wasm_f32x4_eq(vb0123c3, vzero)), vb0123c3));
312         vacc5x0123 = wasm_f32x4_add(vacc5x0123, wasm_f32x4_mul(wasm_v128_andnot(va5, wasm_f32x4_eq(vb0123c3, vzero)), vb0123c3));
313         vacc0x4567 = wasm_f32x4_add(vacc0x4567, wasm_f32x4_mul(wasm_v128_andnot(va0, wasm_f32x4_eq(vb4567c3, vzero)), vb4567c3));
314         vacc1x4567 = wasm_f32x4_add(vacc1x4567, wasm_f32x4_mul(wasm_v128_andnot(va1, wasm_f32x4_eq(vb4567c3, vzero)), vb4567c3));
315         vacc2x4567 = wasm_f32x4_add(vacc2x4567, wasm_f32x4_mul(wasm_v128_andnot(va2, wasm_f32x4_eq(vb4567c3, vzero)), vb4567c3));
316         vacc3x4567 = wasm_f32x4_add(vacc3x4567, wasm_f32x4_mul(wasm_v128_andnot(va3, wasm_f32x4_eq(vb4567c3, vzero)), vb4567c3));
317         vacc4x4567 = wasm_f32x4_add(vacc4x4567, wasm_f32x4_mul(wasm_v128_andnot(va4, wasm_f32x4_eq(vb4567c3, vzero)), vb4567c3));
318         vacc5x4567 = wasm_f32x4_add(vacc5x4567, wasm_f32x4_mul(wasm_v128_andnot(va5, wasm_f32x4_eq(vb4567c3, vzero)), vb4567c3));
319 
320 
321         w += 32;
322       }
323       p -= 6 * sizeof(void*);
324     } while (p != 0);
325 
326 
327     if XNN_LIKELY(nc >= 8) {
328       wasm_v128_store(c5, vacc5x0123);
329       wasm_v128_store(c5 + 4, vacc5x4567);
330       c5 = (float*) ((uintptr_t) c5 + cn_stride);
331       wasm_v128_store(c4, vacc4x0123);
332       wasm_v128_store(c4 + 4, vacc4x4567);
333       c4 = (float*) ((uintptr_t) c4 + cn_stride);
334       wasm_v128_store(c3, vacc3x0123);
335       wasm_v128_store(c3 + 4, vacc3x4567);
336       c3 = (float*) ((uintptr_t) c3 + cn_stride);
337       wasm_v128_store(c2, vacc2x0123);
338       wasm_v128_store(c2 + 4, vacc2x4567);
339       c2 = (float*) ((uintptr_t) c2 + cn_stride);
340       wasm_v128_store(c1, vacc1x0123);
341       wasm_v128_store(c1 + 4, vacc1x4567);
342       c1 = (float*) ((uintptr_t) c1 + cn_stride);
343       wasm_v128_store(c0, vacc0x0123);
344       wasm_v128_store(c0 + 4, vacc0x4567);
345       c0 = (float*) ((uintptr_t) c0 + cn_stride);
346 
347       a = (const float**restrict) ((uintptr_t) a - ks);
348       nc -= 8;
349     } else {
350       if (nc & 4) {
351         wasm_v128_store(c5, vacc5x0123);
352         wasm_v128_store(c4, vacc4x0123);
353         wasm_v128_store(c3, vacc3x0123);
354         wasm_v128_store(c2, vacc2x0123);
355         wasm_v128_store(c1, vacc1x0123);
356         wasm_v128_store(c0, vacc0x0123);
357 
358         vacc5x0123 = vacc5x4567;
359         vacc4x0123 = vacc4x4567;
360         vacc3x0123 = vacc3x4567;
361         vacc2x0123 = vacc2x4567;
362         vacc1x0123 = vacc1x4567;
363         vacc0x0123 = vacc0x4567;
364 
365         c5 += 4;
366         c4 += 4;
367         c3 += 4;
368         c2 += 4;
369         c1 += 4;
370         c0 += 4;
371       }
372       if (nc & 2) {
373         *((double*) c5) = wasm_f64x2_extract_lane(vacc5x0123, 0);
374         *((double*) c4) = wasm_f64x2_extract_lane(vacc4x0123, 0);
375         *((double*) c3) = wasm_f64x2_extract_lane(vacc3x0123, 0);
376         *((double*) c2) = wasm_f64x2_extract_lane(vacc2x0123, 0);
377         *((double*) c1) = wasm_f64x2_extract_lane(vacc1x0123, 0);
378         *((double*) c0) = wasm_f64x2_extract_lane(vacc0x0123, 0);
379 
380         vacc5x0123 = wasm_v32x4_shuffle(vacc5x0123, vacc5x0123, 2, 3, 2, 3);
381         vacc4x0123 = wasm_v32x4_shuffle(vacc4x0123, vacc4x0123, 2, 3, 2, 3);
382         vacc3x0123 = wasm_v32x4_shuffle(vacc3x0123, vacc3x0123, 2, 3, 2, 3);
383         vacc2x0123 = wasm_v32x4_shuffle(vacc2x0123, vacc2x0123, 2, 3, 2, 3);
384         vacc1x0123 = wasm_v32x4_shuffle(vacc1x0123, vacc1x0123, 2, 3, 2, 3);
385         vacc0x0123 = wasm_v32x4_shuffle(vacc0x0123, vacc0x0123, 2, 3, 2, 3);
386 
387         c5 += 2;
388         c4 += 2;
389         c3 += 2;
390         c2 += 2;
391         c1 += 2;
392         c0 += 2;
393       }
394       if (nc & 1) {
395         *c5 = wasm_f32x4_extract_lane(vacc5x0123, 0);
396         *c4 = wasm_f32x4_extract_lane(vacc4x0123, 0);
397         *c3 = wasm_f32x4_extract_lane(vacc3x0123, 0);
398         *c2 = wasm_f32x4_extract_lane(vacc2x0123, 0);
399         *c1 = wasm_f32x4_extract_lane(vacc1x0123, 0);
400         *c0 = wasm_f32x4_extract_lane(vacc0x0123, 0);
401       }
402 
403       nc = 0;
404     }
405   } while (nc != 0);
406 }
407