1 // Auto-generated file. Do not edit!
2 // Template: src/f16-raddstoreexpminusmax/avx2-rr1-p2.c.in
3 // Generator: tools/xngen
4 //
5 // Copyright 2022 Google LLC
6 //
7 // This source code is licensed under the BSD-style license found in the
8 // LICENSE file in the root directory of this source tree.
9
10 #include <assert.h>
11
12 #include <immintrin.h>
13
14 #include <xnnpack/intrinsics-polyfill.h>
15 #include <xnnpack/raddstoreexpminusmax.h>
16
17
xnn_f16_raddstoreexpminusmax_ukernel__avx2_rr1_p2_x40(size_t batch,const void * input,const void * max,void * output,void * sum,const union xnn_f16_expminus_params params[restrict XNN_MIN_ELEMENTS (1)])18 void xnn_f16_raddstoreexpminusmax_ukernel__avx2_rr1_p2_x40(
19 size_t batch,
20 const void* input,
21 const void* max,
22 void* output,
23 void* sum,
24 const union xnn_f16_expminus_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
25 {
26 assert(batch % sizeof(uint16_t) == 0);
27
28 const __m256 vi_max = _mm256_cvtph_ps(_mm_set1_epi16((short) *((const uint16_t*) max)));
29 const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_p2.log2e);
30 const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_p2.magic_bias);
31 const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p2.minus_ln2);
32 const __m256 vc2 = _mm256_load_ps(params->avx2_rr1_p2.c2);
33 const __m256 vc1 = _mm256_load_ps(params->avx2_rr1_p2.c1);
34 const __m256 vdenorm_cutoff = _mm256_load_ps(params->avx2_rr1_p2.denorm_cutoff);
35
36 const uint16_t* i = (const uint16_t*) input;
37 uint16_t* o = (uint16_t*) output;
38 __m256 vacc0 = _mm256_setzero_ps();
39 for (; batch >= 40 * sizeof(uint16_t); batch -= 40 * sizeof(uint16_t)) {
40 const __m256 vi0 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
41 const __m256 vi1 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 8)));
42 const __m256 vi2 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 16)));
43 const __m256 vi3 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 24)));
44 const __m256 vi4 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + 32)));
45 i += 40;
46
47 const __m256 vx0 = _mm256_sub_ps(vi0, vi_max);
48 const __m256 vx1 = _mm256_sub_ps(vi1, vi_max);
49 const __m256 vx2 = _mm256_sub_ps(vi2, vi_max);
50 const __m256 vx3 = _mm256_sub_ps(vi3, vi_max);
51 const __m256 vx4 = _mm256_sub_ps(vi4, vi_max);
52
53 __m256 vn0 = _mm256_fmadd_ps(vx0, vlog2e, vmagic_bias);
54 __m256 vn1 = _mm256_fmadd_ps(vx1, vlog2e, vmagic_bias);
55 __m256 vn2 = _mm256_fmadd_ps(vx2, vlog2e, vmagic_bias);
56 __m256 vn3 = _mm256_fmadd_ps(vx3, vlog2e, vmagic_bias);
57 __m256 vn4 = _mm256_fmadd_ps(vx4, vlog2e, vmagic_bias);
58
59 const __m256 vs0 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn0), 23));
60 const __m256 vs1 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn1), 23));
61 const __m256 vs2 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn2), 23));
62 const __m256 vs3 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn3), 23));
63 const __m256 vs4 = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn4), 23));
64
65 vn0 = _mm256_sub_ps(vn0, vmagic_bias);
66 vn1 = _mm256_sub_ps(vn1, vmagic_bias);
67 vn2 = _mm256_sub_ps(vn2, vmagic_bias);
68 vn3 = _mm256_sub_ps(vn3, vmagic_bias);
69 vn4 = _mm256_sub_ps(vn4, vmagic_bias);
70
71 __m256 vt0 = _mm256_fmadd_ps(vn0, vminus_ln2, vx0);
72 __m256 vt1 = _mm256_fmadd_ps(vn1, vminus_ln2, vx1);
73 __m256 vt2 = _mm256_fmadd_ps(vn2, vminus_ln2, vx2);
74 __m256 vt3 = _mm256_fmadd_ps(vn3, vminus_ln2, vx3);
75 __m256 vt4 = _mm256_fmadd_ps(vn4, vminus_ln2, vx4);
76
77 const __m256 vp0 = _mm256_fmadd_ps(vc2, vt0, vc1);
78 const __m256 vp1 = _mm256_fmadd_ps(vc2, vt1, vc1);
79 const __m256 vp2 = _mm256_fmadd_ps(vc2, vt2, vc1);
80 const __m256 vp3 = _mm256_fmadd_ps(vc2, vt3, vc1);
81 const __m256 vp4 = _mm256_fmadd_ps(vc2, vt4, vc1);
82
83 vt0 = _mm256_mul_ps(vt0, vs0);
84 vt1 = _mm256_mul_ps(vt1, vs1);
85 vt2 = _mm256_mul_ps(vt2, vs2);
86 vt3 = _mm256_mul_ps(vt3, vs3);
87 vt4 = _mm256_mul_ps(vt4, vs4);
88
89 __m256 vf0 = _mm256_fmadd_ps(vt0, vp0, vs0);
90 __m256 vf1 = _mm256_fmadd_ps(vt1, vp1, vs1);
91 __m256 vf2 = _mm256_fmadd_ps(vt2, vp2, vs2);
92 __m256 vf3 = _mm256_fmadd_ps(vt3, vp3, vs3);
93 __m256 vf4 = _mm256_fmadd_ps(vt4, vp4, vs4);
94
95 vf0 = _mm256_andnot_ps(_mm256_cmp_ps(vx0, vdenorm_cutoff, _CMP_LT_OS), vf0);
96 vf1 = _mm256_andnot_ps(_mm256_cmp_ps(vx1, vdenorm_cutoff, _CMP_LT_OS), vf1);
97 vf2 = _mm256_andnot_ps(_mm256_cmp_ps(vx2, vdenorm_cutoff, _CMP_LT_OS), vf2);
98 vf3 = _mm256_andnot_ps(_mm256_cmp_ps(vx3, vdenorm_cutoff, _CMP_LT_OS), vf3);
99 vf4 = _mm256_andnot_ps(_mm256_cmp_ps(vx4, vdenorm_cutoff, _CMP_LT_OS), vf4);
100
101 _mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vf0, _MM_FROUND_NO_EXC));
102 _mm_storeu_si128((__m128i*) (o + 8), _mm256_cvtps_ph(vf1, _MM_FROUND_NO_EXC));
103 _mm_storeu_si128((__m128i*) (o + 16), _mm256_cvtps_ph(vf2, _MM_FROUND_NO_EXC));
104 _mm_storeu_si128((__m128i*) (o + 24), _mm256_cvtps_ph(vf3, _MM_FROUND_NO_EXC));
105 _mm_storeu_si128((__m128i*) (o + 32), _mm256_cvtps_ph(vf4, _MM_FROUND_NO_EXC));
106 o += 40;
107
108 vacc0 = _mm256_add_ps(vacc0, vf0);
109 vacc0 = _mm256_add_ps(vacc0, vf1);
110 vacc0 = _mm256_add_ps(vacc0, vf2);
111 vacc0 = _mm256_add_ps(vacc0, vf3);
112 vacc0 = _mm256_add_ps(vacc0, vf4);
113 }
114
115 __m256 vacc = vacc0;
116 for (; batch >= 8 * sizeof(uint16_t); batch -= 8 * sizeof(uint16_t)) {
117 const __m256 vi = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
118 i += 8;
119
120 const __m256 vx = _mm256_sub_ps(vi, vi_max);
121
122 __m256 vn = _mm256_fmadd_ps(vx, vlog2e, vmagic_bias);
123
124 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
125
126 vn = _mm256_sub_ps(vn, vmagic_bias);
127
128 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vx);
129
130 const __m256 vp = _mm256_fmadd_ps(vc2, vt, vc1);
131 vt = _mm256_mul_ps(vt, vs);
132 __m256 vf = _mm256_fmadd_ps(vt, vp, vs);
133 vf = _mm256_andnot_ps(_mm256_cmp_ps(vx, vdenorm_cutoff, _CMP_LT_OS), vf);
134
135 _mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vf, _MM_FROUND_NO_EXC));
136 o += 8;
137
138 vacc = _mm256_add_ps(vacc, vf);
139 }
140 __m128 vacc_lo = _mm_add_ps(_mm256_castps256_ps128(vacc), _mm256_extractf128_ps(vacc, 1));
141 if (batch != 0) {
142 assert(batch >= 1 * sizeof(uint16_t));
143 assert(batch <= 7 * sizeof(uint16_t));
144
145 const __m256 vi = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
146
147 const __m256 vx = _mm256_sub_ps(vi, vi_max);
148
149 __m256 vn = _mm256_fmadd_ps(vx, vlog2e, vmagic_bias);
150
151 const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
152
153 vn = _mm256_sub_ps(vn, vmagic_bias);
154
155 __m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vx);
156
157 const __m256 vp = _mm256_fmadd_ps(vc2, vt, vc1);
158 vt = _mm256_mul_ps(vt, vs);
159 __m256 vf = _mm256_fmadd_ps(vt, vp, vs);
160 vf = _mm256_andnot_ps(_mm256_cmp_ps(vx, vdenorm_cutoff, _CMP_LT_OS), vf);
161
162 __m128i vh = _mm256_cvtps_ph(vf, _MM_FROUND_NO_EXC);
163 __m128 vf_lo = _mm256_castps256_ps128(vf);
164 if (batch & (4 * sizeof(uint16_t))) {
165 _mm_storel_epi64((__m128i*) o, vh);
166 vh = _mm_unpackhi_epi64(vh, vh);
167 vacc_lo = _mm_add_ps(vacc_lo, vf_lo);
168 vf_lo = _mm256_extractf128_ps(vf, 1);
169 o += 4;
170 }
171 if (batch & (2 * sizeof(uint16_t))) {
172 _mm_storeu_si32(o, vh);
173 vh = _mm_srli_epi64(vh, 32);
174 vacc_lo = _mm_blend_ps(_mm_add_ps(vacc_lo, vf_lo), vacc_lo, 0xC);
175 vf_lo = _mm_movehl_ps(vf_lo, vf_lo);
176 o += 2;
177 }
178 if (batch & (1 * sizeof(uint16_t))) {
179 *o = (uint16_t) _mm_extract_epi16(vh, 0);
180 vacc_lo = _mm_add_ss(vacc_lo, vf_lo);
181 }
182 }
183 vacc_lo = _mm_add_ps(vacc_lo, _mm_movehl_ps(vacc_lo, vacc_lo));
184 vacc_lo = _mm_add_ss(vacc_lo, _mm_movehdup_ps(vacc_lo));
185 *((uint16_t*) sum) = (uint16_t) _mm_extract_epi16(_mm_cvtps_ph(vacc_lo, _MM_FROUND_NO_EXC), 0);
186 _mm256_zeroupper();
187 }
188