1 /* 2 * Copyright (c) 2021 Arm Limited. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in all 14 * copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 #ifndef ARM_COMPUTE_CL_DIRECT_CONV2D_H 25 #define ARM_COMPUTE_CL_DIRECT_CONV2D_H 26 27 #include "src/gpu/cl/ClCompileContext.h" 28 #include "src/gpu/cl/IClKernel.h" 29 #include "src/gpu/cl/IClOperator.h" 30 31 #include <memory> 32 33 namespace arm_compute 34 { 35 namespace opencl 36 { 37 /** Basic function to simulate a directly convolution layer. This function calls the following OpenCL kernels: 38 * 39 * -# @ref CLFillBorderKernel (executed if padding size is different from zero) 40 * -# @ref opencl::ClDirectConv2d 41 */ 42 class ClDirectConv2d : public IClOperator 43 { 44 public: 45 ClDirectConv2d() = default; 46 /** Set the src and dst tensors. 47 * 48 * @param[in] compile_context The compile context to be used. 49 * @param[in] src Source tensor. 3 lower dimensions represent a single src [width, height, IFM], 50 * while every optional dimension from 4 and above represent a batch of srcs. 51 * Data types supported: QASYMM8_SIGNED/QASYMM8/F16/F32. 52 * @param[in] weights Weights tensor. Weights are 4D tensor with dimensions [kernel_x, kernel_y, IFM, OFM]. Data type supported:Same as @p src. 53 * @param[in] biases Biases tensor. Shared biases supported. Biases are 1D tensor with dimensions [OFM]. 54 * Data type supported: Should match @p src data type, except for src of QASYMM8 and QASYMM8_SIGNED type where biases should be of S32 type. 55 * @param[out] dst Destination tensor. 3 lower dimensions represent a single dst [width, height, OFM], while the rest represent batch of dsts. 56 * Data types supported: Same as @p src. 57 * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo. 58 * @param[in] act_info (Optional) Activation layer information in case of a fused activation. 59 * 60 */ 61 void configure(const CLCompileContext &compile_context, ITensorInfo *src, ITensorInfo *weights, ITensorInfo *biases, ITensorInfo *dst, const PadStrideInfo &conv_info, 62 const ActivationLayerInfo &act_info = ActivationLayerInfo()); 63 /** Static function to check if given info will lead to a valid configuration 64 * 65 * Similar to ClDirectConv2d::configure() 66 * 67 * @return a status 68 */ 69 static Status validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst, const PadStrideInfo &conv_info, 70 const ActivationLayerInfo &act_info = ActivationLayerInfo()); 71 72 // Inherited method overridden 73 void run(ITensorPack &tensors) override; 74 75 private: 76 std::unique_ptr<IClKernel> _direct_conv_kernel{ nullptr }; 77 std::unique_ptr<IClKernel> _src_border_handler{ nullptr }; 78 std::unique_ptr<IClKernel> _activation_kernel{ nullptr }; 79 }; 80 } // namespace opencl 81 } // namespace arm_compute 82 #endif /* ARM_COMPUTE_CL_DIRECT_CONV2D_H */