1 /*
2 * Copyright (c) 2022-2023 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24 #include "src/gpu/cl/kernels/ClIndirectConv2dKernel.h"
25
26 #include "arm_compute/core/CL/CLKernelLibrary.h"
27 #include "arm_compute/core/CL/ICLTensor.h"
28 #include "arm_compute/core/KernelDescriptors.h"
29 #include "arm_compute/core/Utils.h"
30 #include "arm_compute/core/utils/misc/ShapeCalculator.h"
31 #include "src/core/CL/CLUtils.h"
32 #include "src/core/CL/CLValidate.h"
33 #include "src/core/helpers/AutoConfiguration.h"
34 #include "src/core/helpers/WindowHelpers.h"
35 #include "src/gpu/cl/kernels/gemm/ClGemmHelpers.h"
36 #include "support/Cast.h"
37 #include "support/StringSupport.h"
38
39 namespace arm_compute
40 {
41 namespace opencl
42 {
43 namespace kernels
44 {
45 namespace
46 {
validate_arguments(const ITensorInfo * src,const ITensorInfo * weights,const ITensorInfo * biases,const ITensorInfo * indirect_buffer,const ITensorInfo * dst,const PadStrideInfo & conv_info,const ActivationLayerInfo & act_info,const DirectConvComputeKernelInfo & desc)47 Status validate_arguments(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *indirect_buffer, const ITensorInfo *dst,
48 const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info, const DirectConvComputeKernelInfo &desc)
49 {
50 ARM_COMPUTE_UNUSED(act_info);
51 ARM_COMPUTE_RETURN_ERROR_ON_F16_UNSUPPORTED(src);
52 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(src, 1, DataType::F16, DataType::F32);
53 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(indirect_buffer, 1, DataType::S32);
54 ARM_COMPUTE_RETURN_ERROR_ON_DATA_LAYOUT_NOT_IN(src, DataLayout::NHWC);
55 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(src, weights);
56 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DIMENSIONS(indirect_buffer->tensor_shape(),
57 misc::shape_calculator::compute_indirect_buffer_shape(src->tensor_shape(),
58 src->data_layout(),
59 weights->tensor_shape(),
60 conv_info,
61 desc));
62
63 constexpr int channel_idx = 0;
64 constexpr int batch_idx = 3;
65
66 ARM_COMPUTE_RETURN_ERROR_ON_MSG(weights->dimension(channel_idx) != src->dimension(channel_idx), "Weights feature map dimension should match the respective src's one");
67 ARM_COMPUTE_RETURN_ERROR_ON_MSG(weights->num_dimensions() > 4, "Weights can be at most 4 dimensional");
68
69 ARM_COMPUTE_RETURN_ERROR_ON_MSG(desc.m0 <= 0 || desc.m0 > 8, "M0 can only be greater than 0 and less than or equal to 8");
70
71 ARM_COMPUTE_RETURN_ERROR_ON_MSG(desc.n0 != 1 && desc.n0 != 2 && desc.n0 != 3 && desc.n0 != 4 && desc.n0 != 8 && desc.n0 != 16,
72 "N0 can only be: 1, 2, 3, 4, 8, and 16");
73 ARM_COMPUTE_RETURN_ERROR_ON_MSG(desc.k0 != 1 && desc.k0 != 2 && desc.k0 != 3 && desc.k0 != 4 && desc.k0 != 8 && desc.k0 != 16,
74 "K0 can only be: 1, 2, 3, 4, 8, and 16");
75
76 if(desc.export_weights_to_cl_image)
77 {
78 ARM_COMPUTE_RETURN_ERROR_ON_MSG(desc.k0 != 4 && desc.k0 != 8 && desc.k0 != 16,
79 "K0 can only be: 4, 8, and 16");
80 ARM_COMPUTE_RETURN_ERROR_ON_MSG(!export_to_cl_image(weights),
81 "Export to CLImage is not supported for this weight configuration");
82 }
83
84 if(biases != nullptr)
85 {
86 if(is_data_type_quantized_asymmetric(src->data_type()))
87 {
88 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(biases, 1, DataType::S32);
89 }
90 else
91 {
92 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(weights, biases);
93 }
94 ARM_COMPUTE_RETURN_ERROR_ON_MSG(biases->dimension(channel_idx) != weights->dimension(batch_idx),
95 "Biases size and number of dst feature maps should match");
96 ARM_COMPUTE_RETURN_ERROR_ON_MSG(biases->num_dimensions() > 1,
97 "Biases should be one dimensional");
98 }
99
100 // Checks performed when dst is configured
101 if(dst->total_size() != 0)
102 {
103 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DIMENSIONS(dst->tensor_shape(),
104 misc::shape_calculator::compute_deep_convolution_shape(*src, *weights, conv_info));
105 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(src, dst);
106 }
107
108 return Status{};
109 }
110 } // namespace
111
ClIndirectConv2dKernel()112 ClIndirectConv2dKernel::ClIndirectConv2dKernel()
113 {
114 _type = CLKernelType::DIRECT;
115 }
116
configure(const CLCompileContext & compile_context,ITensorInfo * src,ITensorInfo * weights,ITensorInfo * biases,ITensorInfo * indirect_buffer,ITensorInfo * dst,const PadStrideInfo & conv_info,const ActivationLayerInfo & act_info,const DirectConvComputeKernelInfo & desc)117 void ClIndirectConv2dKernel::configure(const CLCompileContext &compile_context, ITensorInfo *src, ITensorInfo *weights, ITensorInfo *biases, ITensorInfo *indirect_buffer, ITensorInfo *dst,
118 const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info, const DirectConvComputeKernelInfo &desc)
119 {
120 ARM_COMPUTE_ERROR_ON_NULLPTR(src, weights, indirect_buffer, dst);
121
122 // Perform validation
123 ARM_COMPUTE_ERROR_THROW_ON(validate_arguments(src, weights, biases, indirect_buffer, dst, conv_info, act_info, desc));
124
125 constexpr unsigned int channel_idx = 0;
126 constexpr unsigned int width_idx = 1;
127 constexpr unsigned int height_idx = 2;
128 const unsigned int kernel_width = weights->dimension(width_idx);
129 const unsigned int kernel_height = weights->dimension(height_idx);
130 const DataType data_type = src->data_type();
131
132 const GPUTarget gpu_target = get_target();
133
134 // Get dst shape
135 TensorShape output_shape = misc::shape_calculator::compute_deep_convolution_shape(*src, *weights, conv_info);
136
137 // Output auto inizialitation if not yet initialized
138 auto_init_if_empty(*dst, output_shape,
139 1,
140 src->data_type(),
141 src->quantization_info());
142
143 // Configure kernel window
144 Window win;
145 output_shape.collapse(2U, 1U);
146 const unsigned int n0 = adjust_vec_size(desc.n0, output_shape[0]);
147 const unsigned int m0 = adjust_vec_size(desc.m0, output_shape[1]);
148 const unsigned int k0 = adjust_vec_size(desc.k0, src->dimension(channel_idx));
149
150 const unsigned int partial_store_n0 = dst->dimension(channel_idx) % n0;
151
152 // Create window and update padding
153 win = calculate_max_window(output_shape, Steps(n0, m0));
154
155 ICLKernel::configure_internal(win);
156
157 std::stringstream kernel_name;
158 CLBuildOptions build_options;
159
160 kernel_name << "indirect_convolution_nhwc";
161
162 _export_to_cl_image = desc.export_weights_to_cl_image;
163
164 // Update the padding for the weights tensor if we can export to cl_image
165 if(_export_to_cl_image)
166 {
167 gemm::update_padding_for_cl_image(weights);
168 }
169
170 // Add padding to indirect buffer to avoid out-of-bound reads
171 // When M0 is 5, 6, and 7, we use vload8 to fetch the data from the buffer
172 const unsigned int load_indirect_buf_size = m0 > 4 ? 8 : m0;
173 const unsigned int indirect_buf_width = indirect_buffer->tensor_shape()[0];
174 const unsigned int round_up_width = ((indirect_buf_width + load_indirect_buf_size - 1) / load_indirect_buf_size) * load_indirect_buf_size;
175 const unsigned int padding = round_up_width - indirect_buf_width;
176 indirect_buffer->extend_padding(PaddingSize(0, indirect_buffer->padding().right + padding, 0, 0));
177
178 if(biases != nullptr)
179 {
180 build_options.add_option(std::string("-DHAS_BIAS"));
181 build_options.add_option(std::string("-DBIA_DATA_TYPE=" + get_cl_type_from_data_type(biases->data_type())));
182 }
183
184 // Conditions of -cl-fast-relaxed-math causing accuracy issues can be traced from COMPMID-5324
185 const auto act_function = act_info.activation();
186
187 if((gpu_target != GPUTarget::G71 && (gpu_target & GPUTarget::GPU_ARCH_MASK) == GPUTarget::BIFROST)
188 && (act_function == ActivationLayerInfo::ActivationFunction::BOUNDED_RELU || act_function == ActivationLayerInfo::ActivationFunction::LU_BOUNDED_RELU)
189 && (data_type == DataType::F32 || data_type == DataType::F16))
190 {
191 // -cl-fast-relaxed-math also sets -cl-finite-math-only and -cl-unsafe-math-optimizations
192 // to disable -cl-finite-math-only, we only include -cl-unsafe-math-optimizations
193 build_options.add_option("-cl-unsafe-math-optimizations");
194 }
195 else
196 {
197 build_options.add_option("-cl-fast-relaxed-math");
198 }
199
200 build_options.add_option("-DSRC_TENSOR_TYPE=BUFFER");
201 build_options.add_option("-DSRC_DATA_TYPE=" + get_cl_type_from_data_type(data_type));
202 build_options.add_option("-DSRC_CHANNELS=" + support::cpp11::to_string(src->dimension(channel_idx)));
203 build_options.add_option("-DOFF_TENSOR_TYPE=BUFFER");
204 build_options.add_option("-DDST_WIDTH=" + support::cpp11::to_string(dst->dimension(width_idx)));
205 build_options.add_option("-DDST_HEIGHT=" + support::cpp11::to_string(dst->dimension(height_idx)));
206 build_options.add_option("-DDST_TENSOR_TYPE=BUFFER");
207 build_options.add_option("-DDST_DATA_TYPE=" + get_cl_type_from_data_type(data_type));
208 build_options.add_option_if_else(_export_to_cl_image, "-DWEI_TENSOR_TYPE=IMAGE", "-DWEI_TENSOR_TYPE=BUFFER");
209 build_options.add_option("-DWEI_WIDTH=" + support::cpp11::to_string(kernel_width));
210 build_options.add_option("-DWEI_HEIGHT=" + support::cpp11::to_string(kernel_height));
211 build_options.add_option("-DWEI_DATA_TYPE=" + get_cl_type_from_data_type(data_type));
212 build_options.add_option("-DN0=" + support::cpp11::to_string(n0));
213 build_options.add_option("-DM0=" + support::cpp11::to_string(m0));
214 build_options.add_option("-DK0=" + support::cpp11::to_string(k0));
215 build_options.add_option("-DPARTIAL_N0=" + support::cpp11::to_string(partial_store_n0));
216 build_options.add_option("-DIND_BUFF_VEC_SIZE=" + support::cpp11::to_string(load_indirect_buf_size));
217 build_options.add_option_if((src->dimension(channel_idx) % k0) != 0, "-DLEFTOVER_LOOP");
218 build_options.add_option("-DACTIVATION_TYPE=" + lower_string(string_from_activation_func(act_function)));
219 build_options.add_option_if(act_info.enabled(), "-DA_VAL=" + float_to_string_with_full_precision(act_info.a()));
220 build_options.add_option_if(act_info.enabled(), "-DB_VAL=" + float_to_string_with_full_precision(act_info.b()));
221
222 // A macro guard to compile ONLY the kernel of interest
223 build_options.add_option("-D" + upper_string(kernel_name.str()));
224
225 if(compile_context.get_ddk_version() >= 30)
226 {
227 build_options.add_option("-fregister-allocation=64");
228 }
229
230 _kernel = create_kernel(compile_context, kernel_name.str(), build_options.options());
231
232 // Set config_id for enabling LWS tuning
233 _config_id = kernel_name.str();
234 _config_id += "_";
235 _config_id += lower_string(string_from_data_type(data_type));
236 _config_id += "_";
237 _config_id += support::cpp11::to_string(kernel_width);
238 _config_id += "_";
239 _config_id += support::cpp11::to_string(kernel_height);
240 _config_id += "_";
241 _config_id += support::cpp11::to_string(src->dimension(width_idx));
242 _config_id += "_";
243 _config_id += support::cpp11::to_string(src->dimension(height_idx));
244 _config_id += "_";
245 _config_id += support::cpp11::to_string(src->dimension(channel_idx));
246 _config_id += "_";
247 _config_id += support::cpp11::to_string(dst->dimension(width_idx));
248 _config_id += "_";
249 _config_id += support::cpp11::to_string(dst->dimension(height_idx));
250 _config_id += "_";
251 _config_id += support::cpp11::to_string(dst->dimension(channel_idx));
252 }
253
validate(const ITensorInfo * src,const ITensorInfo * weights,const ITensorInfo * biases,const ITensorInfo * indirect_buffer,const ITensorInfo * dst,const PadStrideInfo & conv_info,const ActivationLayerInfo & act_info,const DirectConvComputeKernelInfo & desc)254 Status ClIndirectConv2dKernel::validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *indirect_buffer, const ITensorInfo *dst,
255 const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info, const DirectConvComputeKernelInfo &desc)
256 {
257 ARM_COMPUTE_RETURN_ON_ERROR(validate_arguments(src, weights, biases, indirect_buffer, dst, conv_info, act_info, desc));
258 return Status{};
259 }
260
run_op(ITensorPack & tensors,const Window & window,cl::CommandQueue & queue)261 void ClIndirectConv2dKernel::run_op(ITensorPack &tensors, const Window &window, cl::CommandQueue &queue)
262 {
263 ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this);
264 ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(IKernel::window(), window);
265
266 // Get initial windows
267 Window slice = window.first_slice_window_3D();
268
269 const auto src = utils::cast::polymorphic_downcast<const ICLTensor *>(tensors.get_const_tensor(TensorType::ACL_SRC_0));
270 const auto weights = utils::cast::polymorphic_downcast<const ICLTensor *>(tensors.get_const_tensor(TensorType::ACL_SRC_1));
271 const auto biases = utils::cast::polymorphic_downcast<const ICLTensor *>(tensors.get_const_tensor(TensorType::ACL_SRC_2));
272 const auto indirect_buffer = utils::cast::polymorphic_downcast<const ICLTensor *>(tensors.get_const_tensor(TensorType::ACL_SRC_3));
273 auto dst = utils::cast::polymorphic_downcast<ICLTensor *>(tensors.get_tensor(TensorType::ACL_DST));
274
275 cl::Image2D weights_cl_image;
276
277 if(_export_to_cl_image)
278 {
279 const size_t image_w = weights->info()->dimension(0) / 4;
280 const size_t image_h = weights->info()->dimension(1) * weights->info()->dimension(2) * weights->info()->dimension(3);
281 const TensorShape shape2d(image_w, image_h);
282 const size_t image_row_pitch = weights->info()->strides_in_bytes()[1];
283
284 // Export cl_buffer to cl_image
285 weights_cl_image = create_image2d_from_buffer(CLKernelLibrary::get().context(), weights->cl_buffer(), shape2d, weights->info()->data_type(), image_row_pitch, CLImage2DType::ReadOnly);
286 }
287
288 unsigned int idx = 0;
289 add_4d_tensor_nhwc_argument(idx, src);
290 add_4d_tensor_nhwc_argument(idx, indirect_buffer);
291 add_4d_tensor_nhwc_argument(idx, dst);
292 if(_export_to_cl_image)
293 {
294 _kernel.setArg(idx++, weights_cl_image);
295 }
296 add_4d_tensor_nhwc_argument(idx, weights);
297 if(biases != nullptr)
298 {
299 add_1D_tensor_argument(idx, biases, slice);
300 }
301 enqueue(queue, *this, slice, lws_hint());
302 }
303 } // namespace kernels
304 } // namespace opencl
305 } // namespace arm_compute
306