1 /* 2 * Copyright (c) 2017-2023 Arm Limited. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in all 14 * copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 #ifndef ARM_COMPUTE_CL_DIRECT_CONV2D_KERNEL_H 25 #define ARM_COMPUTE_CL_DIRECT_CONV2D_KERNEL_H 26 27 #include "src/core/common/Macros.h" 28 #include "src/gpu/cl/ClCompileContext.h" 29 #include "src/gpu/cl/IClKernel.h" 30 31 namespace arm_compute 32 { 33 // Forward declaration 34 struct DirectConvComputeKernelInfo; 35 36 namespace opencl 37 { 38 namespace kernels 39 { 40 /** Interface for the direct convolution kernel. */ 41 class ClDirectConv2dKernel : public IClKernel 42 { 43 public: 44 ClDirectConv2dKernel(); 45 ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(ClDirectConv2dKernel); 46 /** Set the src, weights, biases and dst tensors info. 47 * 48 * @note: Due to set_valid_region() in NCHW, src/weights/biases cannot be const. Need to change this once the set_valid_region() is removed. 49 * 50 * @note: DirectConvolution only works in the following configurations for the NCHW data layout: 51 * 1x1 convolution with stride_x = 1/2/3, stride_y = 1/2/3 52 * 3x3 convolution with stride_x = 1/2, stride_y = 1/2 53 * 5x5 convolution with stride_x = 1/2, stride_y = 1/2 54 * 9x9 convolution with stride_x = 1/2, stride_y = 1/2 55 * 56 * @param[in] compile_context The compile context to be used. 57 * @param[in] src The src tensor info to convolve. 3 lower dimensions represent a single src [width, height, IFM], 58 * while every optional dimension from 4 and above represent a batch of inputs. Data types supported: QASYMM8_SIGNED/QASYMM8/F16/F32. 59 * @param[in] weights Weights tensor info. Weights are 4D tensor with dimensions [kernel_x, kernel_y, IFM, OFM]. 60 * The 3rd dimension must be the same as the src's volume 3rd dimension. 61 * Data type supported:Same as @p src. 62 * @param[in] biases Biases tensor info. Biases are 1D tensor with dimension [OFM]. 63 * Data type supported: Should match @p src data type, except for src of QASYMM8 and QASYMM8_SIGNED type where biases should be of S32 type 64 * @param[out] dst Output tensor info. 65 * The 3rd dimensions must be equal to the 4th dimension of the @p kernels tensor. Data types supported: Same as @p src. 66 * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo. 67 * @param[in] act_info Contains activaton information described in @ref ActivationLayerInfo. 68 * @param[in] desc Direct convolution descriptor used to build the NHWC direct convolution kernel. For NCHW, this parameter is ignored. 69 */ 70 void configure(const CLCompileContext &compile_context, ITensorInfo *src, ITensorInfo *weights, ITensorInfo *biases, ITensorInfo *dst, 71 const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info, const DirectConvComputeKernelInfo &desc); 72 /** Static function to check if given info will lead to a valid configuration 73 * 74 * Similar to ClDirectConv2dKernel::configure() 75 * 76 * @return a status 77 */ 78 static Status validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *dst, 79 const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info, const DirectConvComputeKernelInfo &desc); 80 81 // Inherited methods overridden: 82 void run_op(ITensorPack &tensors, const Window &window, cl::CommandQueue &queue) override; 83 84 public: 85 DataLayout _data_layout{}; 86 PadStrideInfo _conv_info{}; 87 bool _export_weights_to_cl_image{ false }; 88 bool _export_output_to_cl_image{ false }; 89 bool _export_input_to_cl_image{ false }; 90 }; 91 } // namespace kernels 92 } // namespace opencl 93 } // namespace arm_compute 94 #endif /* ARM_COMPUTE_CL_DIRECT_CONV2D_KERNEL_H */ 95