1 /* 2 * Copyright (c) 2017-2022 Arm Limited. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in all 14 * copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 #ifndef ARM_COMPUTE_CPU_DIRECT_CONV2D_KERNEL_H 25 #define ARM_COMPUTE_CPU_DIRECT_CONV2D_KERNEL_H 26 27 #include "src/core/common/Macros.h" 28 #include "src/cpu/ICpuKernel.h" 29 30 namespace arm_compute 31 { 32 namespace cpu 33 { 34 namespace kernels 35 { 36 /** Interface for the kernel to perform Direct Convolution Layer. */ 37 class CpuDirectConv2dKernel : public ICpuKernel<CpuDirectConv2dKernel> 38 { 39 private: 40 using DirectConv2dKernel_Ptr = std::add_pointer<void(const Window &, const ITensor *, const ITensor *, ITensor *, const PadStrideInfo &)>::type; 41 42 public: 43 CpuDirectConv2dKernel() = default; 44 ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(CpuDirectConv2dKernel); 45 /** Set the src, weights, and dst tensors. 46 * 47 * @note: DirectConvolution only works in the following configurations: 48 * 1x1 convolution with stride_x = 1/2/3, stride_y = 1/2/3 49 * 3x3 convolution with stride_x = 1/2/3, stride_y = 1/2/3 50 * 51 * @param[in] src The input tensor to convolve. 3 lower dimensions represent a single input [width, height, IFM], 52 * while every optional dimension from 4 and above represent a batch of inputs. Data types supported: F16/F32. 53 * @param[in] weights Weights tensor. Weights are 4D tensor with dimensions [kernel_x, kernel_y, IFM, OFM]. 54 * The 3rd dimension must be the same as the input's volume 3rd dimension. 55 * Data type supported:Same as @p input. 56 * @param[out] dst Output tensor. 57 * The 3rd dimensions must be equal to the 4th dimension of the @p kernels tensor. Data types supported: F16/F32 58 * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo. 59 */ 60 void configure(ITensorInfo *src, ITensorInfo *weights, ITensorInfo *dst, const PadStrideInfo &conv_info); 61 /** Static function to check if given info will lead to a valid configuration 62 * 63 * Similar to CpuDirectConv2dKernel::configure() 64 * 65 * @return a status 66 */ 67 static Status validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *dst, const PadStrideInfo &conv_info); 68 69 // Inherited methods overridden: 70 void run_op(ITensorPack &tensors, const Window &window, const ThreadInfo &info) override; 71 const char *name() const override; 72 73 struct DirectConv2dKernel 74 { 75 const char *name; 76 const DataTypeDataLayoutSelectorPtr is_selected; 77 DirectConv2dKernel_Ptr ukernel; 78 }; 79 80 static const std::vector<DirectConv2dKernel> &get_available_kernels(); 81 82 private: 83 PadStrideInfo _conv_info{}; 84 unsigned int _kernel_size{ 0 }; 85 DataLayout _data_layout{ DataLayout::UNKNOWN }; 86 }; 87 } // namespace kernels 88 } // namespace cpu 89 } // namespace arm_compute 90 #endif /*ARM_COMPUTE_CPU_DIRECTCONV2D_KERNEL_H */ 91