1 /* 2 * This file is auto-generated. Modifications will be lost. 3 * 4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/ 5 * for more information. 6 */ 7 #ifndef __QEDR_USER_H__ 8 #define __QEDR_USER_H__ 9 #include <linux/types.h> 10 #define QEDR_ABI_VERSION (8) 11 enum qedr_alloc_ucontext_flags { 12 QEDR_ALLOC_UCTX_EDPM_MODE = 1 << 0, 13 QEDR_ALLOC_UCTX_DB_REC = 1 << 1, 14 QEDR_SUPPORT_DPM_SIZES = 1 << 2, 15 }; 16 struct qedr_alloc_ucontext_req { 17 __u32 context_flags; 18 __u32 reserved; 19 }; 20 #define QEDR_LDPM_MAX_SIZE (8192) 21 #define QEDR_EDPM_TRANS_SIZE (64) 22 #define QEDR_EDPM_MAX_SIZE (ROCE_REQ_MAX_INLINE_DATA_SIZE) 23 enum qedr_rdma_dpm_type { 24 QEDR_DPM_TYPE_NONE = 0, 25 QEDR_DPM_TYPE_ROCE_ENHANCED = 1 << 0, 26 QEDR_DPM_TYPE_ROCE_LEGACY = 1 << 1, 27 QEDR_DPM_TYPE_IWARP_LEGACY = 1 << 2, 28 QEDR_DPM_TYPE_ROCE_EDPM_MODE = 1 << 3, 29 QEDR_DPM_SIZES_SET = 1 << 4, 30 }; 31 struct qedr_alloc_ucontext_resp { 32 __aligned_u64 db_pa; 33 __u32 db_size; 34 __u32 max_send_wr; 35 __u32 max_recv_wr; 36 __u32 max_srq_wr; 37 __u32 sges_per_send_wr; 38 __u32 sges_per_recv_wr; 39 __u32 sges_per_srq_wr; 40 __u32 max_cqes; 41 __u8 dpm_flags; 42 __u8 wids_enabled; 43 __u16 wid_count; 44 __u16 ldpm_limit_size; 45 __u8 edpm_trans_size; 46 __u8 reserved; 47 __u16 edpm_limit_size; 48 __u8 padding[6]; 49 }; 50 struct qedr_alloc_pd_ureq { 51 __aligned_u64 rsvd1; 52 }; 53 struct qedr_alloc_pd_uresp { 54 __u32 pd_id; 55 __u32 reserved; 56 }; 57 struct qedr_create_cq_ureq { 58 __aligned_u64 addr; 59 __aligned_u64 len; 60 }; 61 struct qedr_create_cq_uresp { 62 __u32 db_offset; 63 __u16 icid; 64 __u16 reserved; 65 __aligned_u64 db_rec_addr; 66 }; 67 struct qedr_create_qp_ureq { 68 __u32 qp_handle_hi; 69 __u32 qp_handle_lo; 70 __aligned_u64 sq_addr; 71 __aligned_u64 sq_len; 72 __aligned_u64 rq_addr; 73 __aligned_u64 rq_len; 74 }; 75 struct qedr_create_qp_uresp { 76 __u32 qp_id; 77 __u32 atomic_supported; 78 __u32 sq_db_offset; 79 __u16 sq_icid; 80 __u32 rq_db_offset; 81 __u16 rq_icid; 82 __u32 rq_db2_offset; 83 __u32 reserved; 84 __aligned_u64 sq_db_rec_addr; 85 __aligned_u64 rq_db_rec_addr; 86 }; 87 struct qedr_create_srq_ureq { 88 __aligned_u64 prod_pair_addr; 89 __aligned_u64 srq_addr; 90 __aligned_u64 srq_len; 91 }; 92 struct qedr_create_srq_uresp { 93 __u16 srq_id; 94 __u16 reserved0; 95 __u32 reserved1; 96 }; 97 struct qedr_user_db_rec { 98 __aligned_u64 db_data; 99 }; 100 #endif 101