1 /* 2 * This file is auto-generated. Modifications will be lost. 3 * 4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/ 5 * for more information. 6 */ 7 #ifndef __NDCTL_H__ 8 #define __NDCTL_H__ 9 #include <linux/types.h> 10 struct nd_cmd_dimm_flags { 11 __u32 status; 12 __u32 flags; 13 } __attribute__((__packed__)); 14 struct nd_cmd_get_config_size { 15 __u32 status; 16 __u32 config_size; 17 __u32 max_xfer; 18 } __attribute__((__packed__)); 19 struct nd_cmd_get_config_data_hdr { 20 __u32 in_offset; 21 __u32 in_length; 22 __u32 status; 23 __u8 out_buf[]; 24 } __attribute__((__packed__)); 25 struct nd_cmd_set_config_hdr { 26 __u32 in_offset; 27 __u32 in_length; 28 __u8 in_buf[]; 29 } __attribute__((__packed__)); 30 struct nd_cmd_vendor_hdr { 31 __u32 opcode; 32 __u32 in_length; 33 __u8 in_buf[]; 34 } __attribute__((__packed__)); 35 struct nd_cmd_vendor_tail { 36 __u32 status; 37 __u32 out_length; 38 __u8 out_buf[]; 39 } __attribute__((__packed__)); 40 struct nd_cmd_ars_cap { 41 __u64 address; 42 __u64 length; 43 __u32 status; 44 __u32 max_ars_out; 45 __u32 clear_err_unit; 46 __u16 flags; 47 __u16 reserved; 48 } __attribute__((__packed__)); 49 struct nd_cmd_ars_start { 50 __u64 address; 51 __u64 length; 52 __u16 type; 53 __u8 flags; 54 __u8 reserved[5]; 55 __u32 status; 56 __u32 scrub_time; 57 } __attribute__((__packed__)); 58 struct nd_cmd_ars_status { 59 __u32 status; 60 __u32 out_length; 61 __u64 address; 62 __u64 length; 63 __u64 restart_address; 64 __u64 restart_length; 65 __u16 type; 66 __u16 flags; 67 __u32 num_records; 68 struct nd_ars_record { 69 __u32 handle; 70 __u32 reserved; 71 __u64 err_address; 72 __u64 length; 73 } __attribute__((__packed__)) records[]; 74 } __attribute__((__packed__)); 75 struct nd_cmd_clear_error { 76 __u64 address; 77 __u64 length; 78 __u32 status; 79 __u8 reserved[4]; 80 __u64 cleared; 81 } __attribute__((__packed__)); 82 enum { 83 ND_CMD_IMPLEMENTED = 0, 84 ND_CMD_ARS_CAP = 1, 85 ND_CMD_ARS_START = 2, 86 ND_CMD_ARS_STATUS = 3, 87 ND_CMD_CLEAR_ERROR = 4, 88 ND_CMD_SMART = 1, 89 ND_CMD_SMART_THRESHOLD = 2, 90 ND_CMD_DIMM_FLAGS = 3, 91 ND_CMD_GET_CONFIG_SIZE = 4, 92 ND_CMD_GET_CONFIG_DATA = 5, 93 ND_CMD_SET_CONFIG_DATA = 6, 94 ND_CMD_VENDOR_EFFECT_LOG_SIZE = 7, 95 ND_CMD_VENDOR_EFFECT_LOG = 8, 96 ND_CMD_VENDOR = 9, 97 ND_CMD_CALL = 10, 98 }; 99 enum { 100 ND_ARS_VOLATILE = 1, 101 ND_ARS_PERSISTENT = 2, 102 ND_ARS_RETURN_PREV_DATA = 1 << 1, 103 ND_CONFIG_LOCKED = 1, 104 }; 105 #define ND_IOCTL 'N' 106 #define ND_IOCTL_DIMM_FLAGS _IOWR(ND_IOCTL, ND_CMD_DIMM_FLAGS, struct nd_cmd_dimm_flags) 107 #define ND_IOCTL_GET_CONFIG_SIZE _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_SIZE, struct nd_cmd_get_config_size) 108 #define ND_IOCTL_GET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_DATA, struct nd_cmd_get_config_data_hdr) 109 #define ND_IOCTL_SET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_SET_CONFIG_DATA, struct nd_cmd_set_config_hdr) 110 #define ND_IOCTL_VENDOR _IOWR(ND_IOCTL, ND_CMD_VENDOR, struct nd_cmd_vendor_hdr) 111 #define ND_IOCTL_ARS_CAP _IOWR(ND_IOCTL, ND_CMD_ARS_CAP, struct nd_cmd_ars_cap) 112 #define ND_IOCTL_ARS_START _IOWR(ND_IOCTL, ND_CMD_ARS_START, struct nd_cmd_ars_start) 113 #define ND_IOCTL_ARS_STATUS _IOWR(ND_IOCTL, ND_CMD_ARS_STATUS, struct nd_cmd_ars_status) 114 #define ND_IOCTL_CLEAR_ERROR _IOWR(ND_IOCTL, ND_CMD_CLEAR_ERROR, struct nd_cmd_clear_error) 115 #define ND_DEVICE_DIMM 1 116 #define ND_DEVICE_REGION_PMEM 2 117 #define ND_DEVICE_REGION_BLK 3 118 #define ND_DEVICE_NAMESPACE_IO 4 119 #define ND_DEVICE_NAMESPACE_PMEM 5 120 #define ND_DEVICE_DAX_PMEM 7 121 enum nd_driver_flags { 122 ND_DRIVER_DIMM = 1 << ND_DEVICE_DIMM, 123 ND_DRIVER_REGION_PMEM = 1 << ND_DEVICE_REGION_PMEM, 124 ND_DRIVER_REGION_BLK = 1 << ND_DEVICE_REGION_BLK, 125 ND_DRIVER_NAMESPACE_IO = 1 << ND_DEVICE_NAMESPACE_IO, 126 ND_DRIVER_NAMESPACE_PMEM = 1 << ND_DEVICE_NAMESPACE_PMEM, 127 ND_DRIVER_DAX_PMEM = 1 << ND_DEVICE_DAX_PMEM, 128 }; 129 enum ars_masks { 130 ARS_STATUS_MASK = 0x0000FFFF, 131 ARS_EXT_STATUS_SHIFT = 16, 132 }; 133 struct nd_cmd_pkg { 134 __u64 nd_family; 135 __u64 nd_command; 136 __u32 nd_size_in; 137 __u32 nd_size_out; 138 __u32 nd_reserved2[9]; 139 __u32 nd_fw_size; 140 unsigned char nd_payload[]; 141 }; 142 #define NVDIMM_FAMILY_INTEL 0 143 #define NVDIMM_FAMILY_HPE1 1 144 #define NVDIMM_FAMILY_HPE2 2 145 #define NVDIMM_FAMILY_MSFT 3 146 #define NVDIMM_FAMILY_HYPERV 4 147 #define NVDIMM_FAMILY_PAPR 5 148 #define NVDIMM_FAMILY_MAX NVDIMM_FAMILY_PAPR 149 #define NVDIMM_BUS_FAMILY_NFIT 0 150 #define NVDIMM_BUS_FAMILY_INTEL 1 151 #define NVDIMM_BUS_FAMILY_MAX NVDIMM_BUS_FAMILY_INTEL 152 #define ND_IOCTL_CALL _IOWR(ND_IOCTL, ND_CMD_CALL, struct nd_cmd_pkg) 153 #endif 154