1 /*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #include "context_x86_64.h"
18
19 #include "base/bit_utils.h"
20 #include "base/bit_utils_iterator.h"
21 #include "quick/quick_method_frame_info.h"
22
23 namespace art HIDDEN {
24 namespace x86_64 {
25
26 static constexpr uintptr_t gZero = 0;
27
Reset()28 void X86_64Context::Reset() {
29 std::fill_n(gprs_, arraysize(gprs_), nullptr);
30 std::fill_n(fprs_, arraysize(fprs_), nullptr);
31 gprs_[RSP] = &rsp_;
32 gprs_[RDI] = &arg0_;
33 // Initialize registers with easy to spot debug values.
34 rsp_ = kBadGprBase + RSP;
35 rip_ = kBadGprBase + kNumberOfCpuRegisters;
36 arg0_ = 0;
37 }
38
FillCalleeSaves(uint8_t * frame,const QuickMethodFrameInfo & frame_info)39 void X86_64Context::FillCalleeSaves(uint8_t* frame, const QuickMethodFrameInfo& frame_info) {
40 const size_t frame_size = frame_info.FrameSizeInBytes();
41 int spill_pos = 0;
42
43 // Core registers come first, from the highest down to the lowest.
44 uint32_t core_regs =
45 frame_info.CoreSpillMask() & ~(static_cast<uint32_t>(-1) << kNumberOfCpuRegisters);
46 DCHECK_EQ(1, POPCOUNT(frame_info.CoreSpillMask() & ~core_regs)); // Return address spill.
47 for (uint32_t core_reg : HighToLowBits(core_regs)) {
48 gprs_[core_reg] = CalleeSaveAddress<InstructionSet::kX86_64>(frame, spill_pos, frame_size);
49 ++spill_pos;
50 }
51 DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()) - 1);
52
53 // FP registers come second, from the highest down to the lowest.
54 uint32_t fp_regs = frame_info.FpSpillMask();
55 DCHECK_EQ(0u, fp_regs & (static_cast<uint32_t>(-1) << kNumberOfFloatRegisters));
56 for (uint32_t fp_reg : HighToLowBits(fp_regs)) {
57 fprs_[fp_reg] = reinterpret_cast<uint64_t*>(
58 CalleeSaveAddress<InstructionSet::kX86_64>(frame, spill_pos, frame_size));
59 ++spill_pos;
60 }
61 DCHECK_EQ(spill_pos,
62 POPCOUNT(frame_info.CoreSpillMask()) - 1 + POPCOUNT(frame_info.FpSpillMask()));
63 }
64
SmashCallerSaves()65 void X86_64Context::SmashCallerSaves() {
66 // This needs to be 0 because we want a null/zero return value.
67 gprs_[RAX] = const_cast<uintptr_t*>(&gZero);
68 gprs_[RDX] = const_cast<uintptr_t*>(&gZero);
69 gprs_[RCX] = nullptr;
70 gprs_[RSI] = nullptr;
71 gprs_[RDI] = nullptr;
72 gprs_[R8] = nullptr;
73 gprs_[R9] = nullptr;
74 gprs_[R10] = nullptr;
75 gprs_[R11] = nullptr;
76 fprs_[XMM0] = nullptr;
77 fprs_[XMM1] = nullptr;
78 fprs_[XMM2] = nullptr;
79 fprs_[XMM3] = nullptr;
80 fprs_[XMM4] = nullptr;
81 fprs_[XMM5] = nullptr;
82 fprs_[XMM6] = nullptr;
83 fprs_[XMM7] = nullptr;
84 fprs_[XMM8] = nullptr;
85 fprs_[XMM9] = nullptr;
86 fprs_[XMM10] = nullptr;
87 fprs_[XMM11] = nullptr;
88 }
89
SetGPR(uint32_t reg,uintptr_t value)90 void X86_64Context::SetGPR(uint32_t reg, uintptr_t value) {
91 CHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters));
92 DCHECK(IsAccessibleGPR(reg));
93 CHECK_NE(gprs_[reg], &gZero);
94 *gprs_[reg] = value;
95 }
96
SetFPR(uint32_t reg,uintptr_t value)97 void X86_64Context::SetFPR(uint32_t reg, uintptr_t value) {
98 CHECK_LT(reg, static_cast<uint32_t>(kNumberOfFloatRegisters));
99 DCHECK(IsAccessibleFPR(reg));
100 CHECK_NE(fprs_[reg], reinterpret_cast<const uint64_t*>(&gZero));
101 *fprs_[reg] = value;
102 }
103
CopyContextTo(uintptr_t * gprs,uintptr_t * fprs)104 void X86_64Context::CopyContextTo(uintptr_t* gprs, uintptr_t* fprs) {
105 #if defined(__x86_64__)
106 for (size_t i = 0; i < kNumberOfCpuRegisters; ++i) {
107 gprs[kNumberOfCpuRegisters - i - 1] = gprs_[i] != nullptr ? *gprs_[i] : kBadGprBase + i;
108 }
109 for (size_t i = 0; i < kNumberOfFloatRegisters; ++i) {
110 fprs[i] = fprs_[i] != nullptr ? *fprs_[i] : kBadFprBase + i;
111 }
112
113 // We want to load the stack pointer one slot below so that the ret will pop eip.
114 uintptr_t rsp = gprs[kNumberOfCpuRegisters - RSP - 1] - sizeof(intptr_t);
115 gprs[kNumberOfCpuRegisters] = rsp;
116 *(reinterpret_cast<uintptr_t*>(rsp)) = rip_;
117 #else
118 UNIMPLEMENTED(FATAL);
119 UNREACHABLE();
120 #endif
121 }
122
123 } // namespace x86_64
124 } // namespace art
125