1 /*
2 * Copyright (C) 2011 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #include "context_x86.h"
18
19 #include "base/bit_utils.h"
20 #include "base/bit_utils_iterator.h"
21 #include "base/memory_tool.h"
22 #include "quick/quick_method_frame_info.h"
23
24 namespace art HIDDEN {
25 namespace x86 {
26
27 static constexpr uintptr_t gZero = 0;
28
Reset()29 void X86Context::Reset() {
30 std::fill_n(gprs_, arraysize(gprs_), nullptr);
31 std::fill_n(fprs_, arraysize(fprs_), nullptr);
32 gprs_[ESP] = &esp_;
33 gprs_[EAX] = &arg0_;
34 // Initialize registers with easy to spot debug values.
35 esp_ = kBadGprBase + ESP;
36 eip_ = kBadGprBase + kNumberOfCpuRegisters;
37 arg0_ = 0;
38 }
39
FillCalleeSaves(uint8_t * frame,const QuickMethodFrameInfo & frame_info)40 void X86Context::FillCalleeSaves(uint8_t* frame, const QuickMethodFrameInfo& frame_info) {
41 const size_t frame_size = frame_info.FrameSizeInBytes();
42 int spill_pos = 0;
43
44 // Core registers come first, from the highest down to the lowest.
45 uint32_t core_regs =
46 frame_info.CoreSpillMask() & ~(static_cast<uint32_t>(-1) << kNumberOfCpuRegisters);
47 DCHECK_EQ(1, POPCOUNT(frame_info.CoreSpillMask() & ~core_regs)); // Return address spill.
48 for (uint32_t core_reg : HighToLowBits(core_regs)) {
49 gprs_[core_reg] = CalleeSaveAddress<InstructionSet::kX86>(frame, spill_pos, frame_size);
50 ++spill_pos;
51 }
52 DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()) - 1);
53
54 // FP registers come second, from the highest down to the lowest.
55 uint32_t fp_regs = frame_info.FpSpillMask();
56 DCHECK_EQ(0u, fp_regs & (static_cast<uint32_t>(-1) << kNumberOfFloatRegisters));
57 for (uint32_t fp_reg : HighToLowBits(fp_regs)) {
58 // Two void* per XMM register.
59 fprs_[2 * fp_reg] = reinterpret_cast<uint32_t*>(
60 CalleeSaveAddress<InstructionSet::kX86>(frame, spill_pos + 1, frame_size));
61 fprs_[2 * fp_reg + 1] = reinterpret_cast<uint32_t*>(
62 CalleeSaveAddress<InstructionSet::kX86>(frame, spill_pos, frame_size));
63 spill_pos += 2;
64 }
65 DCHECK_EQ(spill_pos,
66 POPCOUNT(frame_info.CoreSpillMask()) - 1 + 2 * POPCOUNT(frame_info.FpSpillMask()));
67 }
68
SmashCallerSaves()69 void X86Context::SmashCallerSaves() {
70 // This needs to be 0 because we want a null/zero return value.
71 gprs_[EAX] = const_cast<uintptr_t*>(&gZero);
72 gprs_[EDX] = const_cast<uintptr_t*>(&gZero);
73 gprs_[ECX] = nullptr;
74 gprs_[EBX] = nullptr;
75 memset(&fprs_[0], '\0', sizeof(fprs_));
76 }
77
SetGPR(uint32_t reg,uintptr_t value)78 void X86Context::SetGPR(uint32_t reg, uintptr_t value) {
79 CHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters));
80 DCHECK(IsAccessibleGPR(reg));
81 CHECK_NE(gprs_[reg], &gZero);
82 *gprs_[reg] = value;
83 }
84
SetFPR(uint32_t reg,uintptr_t value)85 void X86Context::SetFPR(uint32_t reg, uintptr_t value) {
86 CHECK_LT(reg, static_cast<uint32_t>(kNumberOfFloatRegisters));
87 DCHECK(IsAccessibleFPR(reg));
88 CHECK_NE(fprs_[reg], reinterpret_cast<const uint32_t*>(&gZero));
89 *fprs_[reg] = value;
90 }
91
CopyContextTo(uintptr_t * gprs,uintptr_t * fprs)92 void X86Context::CopyContextTo(uintptr_t* gprs, uintptr_t* fprs) {
93 #if defined(__i386__)
94 // Array of GPR values, filled from the context backward for the long jump pop. We add a slot at
95 // the top for the stack pointer that doesn't get popped in a pop-all.
96 for (size_t i = 0; i < kNumberOfCpuRegisters; ++i) {
97 gprs[kNumberOfCpuRegisters - i - 1] = (gprs_[i] != nullptr) ? *gprs_[i] : (kBadGprBase + i);
98 }
99 for (size_t i = 0; i < kNumberOfFloatRegisters; ++i) {
100 fprs[i] = fprs_[i] != nullptr ? *fprs_[i] : kBadFprBase + i;
101 }
102 // We want to load the stack pointer one slot below so that the ret will pop eip.
103 uintptr_t esp = gprs[kNumberOfCpuRegisters - ESP - 1] - sizeof(intptr_t);
104 gprs[kNumberOfCpuRegisters] = esp;
105 *(reinterpret_cast<uintptr_t*>(esp)) = eip_;
106 #else
107 UNIMPLEMENTED(FATAL);
108 #endif
109 }
110
111 } // namespace x86
112 } // namespace art
113