xref: /XiangShan/src/main/scala/xiangshan/backend/fu/vector/VecPipedFuncUnit.scala (revision d16a780cf74d65405ed0aa88b3627c0aa804c1be) 
1package xiangshan.backend.fu.vector
2
3import chipsalliance.rocketchip.config.Parameters
4import chisel3._
5import chisel3.util._
6import xiangshan.backend.fu.vector.Bundles.VConfig
7import xiangshan.backend.fu.vector.utils.ScalaDupToVector
8import xiangshan.backend.fu.{FuConfig, FuncUnit, HasPipelineReg}
9import yunsuan.VialuFixType
10
11trait VecFuncUnitAlias { this: FuncUnit =>
12  protected val inCtrl  = io.in.bits.ctrl
13  protected val inData  = io.in.bits.data
14  protected val vecCtrl = inCtrl.vpu.get
15
16  protected val vill    = vecCtrl.vill
17  protected val vma     = vecCtrl.vma
18  protected val vta     = vecCtrl.vta
19  protected val vsew    = vecCtrl.vsew
20  protected val vlmul   = vecCtrl.vlmul
21  protected val vm      = vecCtrl.vm
22  protected val vstart  = vecCtrl.vstart
23
24  protected val frm     = vecCtrl.frm
25  protected val vxrm    = vecCtrl.vxrm
26  protected val vuopIdx = vecCtrl.vuopIdx
27  protected val nf      = vecCtrl.frm
28
29  protected val fuOpType  = inCtrl.fuOpType
30  protected val isNarrow  = vecCtrl.isNarrow
31  protected val isExt     = vecCtrl.isExt
32  protected val isMove    = vecCtrl.isMove
33  // swap vs1 and vs2, used by vrsub, etc
34  protected val isReverse = vecCtrl.isReverse
35
36  protected val allMaskTrue = VecInit(Seq.fill(VLEN)(true.B)).asUInt
37  protected val allMaskFalse = VecInit(Seq.fill(VLEN)(false.B)).asUInt
38
39  // vadc.vv, vsbc.vv need this
40  protected val needClearMask: Bool = VialuFixType.needClearMask(inCtrl.fuOpType)
41
42  // There is no difference between control-dependency or data-dependency for function unit,
43  // but spliting these in ctrl or data bundles is easy to coding.
44  protected val srcMask: UInt = if(!cfg.maskWakeUp) inCtrl.vpu.get.vmask else {
45    MuxCase(inData.getSrcMask, Seq(
46      needClearMask -> allMaskFalse,
47      vm -> allMaskTrue
48    ))
49  }
50  protected val srcVConfig: VConfig = if(!cfg.vconfigWakeUp) inCtrl.vpu.get.vconfig else inData.getSrcVConfig.asTypeOf(new VConfig)
51  protected val vl = srcVConfig.vl
52}
53
54class VecPipedFuncUnit(cfg: FuConfig)(implicit p: Parameters) extends FuncUnit(cfg)
55  with HasPipelineReg
56  with VecFuncUnitAlias
57{
58  private val extedVs1 = Wire(UInt(VLEN.W))
59
60  // modules
61  private val scalaDupToVector = Module(new ScalaDupToVector(VLEN))
62
63  scalaDupToVector.io.in.scalaData := inData.src(0)
64  scalaDupToVector.io.in.vsew := vsew
65  extedVs1 := scalaDupToVector.io.out.vecData
66
67  private val src0 = Mux(vecCtrl.needScalaSrc, extedVs1, inData.src(0)) // vs1, rs1, fs1, imm
68  private val src1 = WireInit(inData.src(1)) // vs2 only
69
70  protected val vs2 = Mux(isReverse, src0, src1)
71  protected val vs1 = Mux(isReverse, src1, src0)
72  protected val oldVd = inData.src(2)
73
74  protected val outCtrl     = ctrlVec.last
75  protected val outData     = dataVec.last
76
77  protected val outVecCtrl  = outCtrl.vpu.get
78  protected val outVm       = outVecCtrl.vm
79
80  // vadc.vv, vsbc.vv need this
81  protected val outNeedClearMask: Bool = VialuFixType.needClearMask(outCtrl.fuOpType)
82
83  protected val outVConfig  = if(!cfg.vconfigWakeUp) outCtrl.vpu.get.vconfig else outData.getSrcVConfig.asTypeOf(new VConfig)
84  protected val outVl       = outVConfig.vl
85  protected val outOldVd    = outData.src(2)
86  // There is no difference between control-dependency or data-dependency for function unit,
87  // but spliting these in ctrl or data bundles is easy to coding.
88  protected val outSrcMask: UInt = if (!cfg.maskWakeUp) outCtrl.vpu.get.vmask else {
89    MuxCase(
90      outData.getSrcMask, Seq(
91        outNeedClearMask -> allMaskFalse,
92        outVm -> allMaskTrue
93      )
94    )
95  }
96
97  override def latency: Int = cfg.latency.latencyVal.get
98
99}
100