1package xiangshan.backend.fu.vector 2 3import chipsalliance.rocketchip.config.Parameters 4import chisel3._ 5import chisel3.util._ 6import xiangshan.backend.fu.vector.Bundles.VConfig 7import xiangshan.backend.fu.vector.utils.ScalaDupToVector 8import xiangshan.backend.fu.{FuConfig, FuncUnit, HasPipelineReg} 9import yunsuan.VialuFixType 10 11trait VecFuncUnitAlias { this: FuncUnit => 12 protected val inCtrl = io.in.bits.ctrl 13 protected val inData = io.in.bits.data 14 protected val vecCtrl = inCtrl.vpu.get 15 16 protected val vill = vecCtrl.vill 17 protected val vma = vecCtrl.vma 18 protected val vta = vecCtrl.vta 19 protected val vsew = vecCtrl.vsew 20 protected val vlmul = vecCtrl.vlmul 21 protected val vm = vecCtrl.vm 22 protected val vstart = vecCtrl.vstart 23 24 protected val frm = vecCtrl.frm 25 protected val vxrm = vecCtrl.vxrm 26 protected val vuopIdx = vecCtrl.vuopIdx 27 protected val nf = vecCtrl.frm 28 29 protected val fuOpType = inCtrl.fuOpType 30 protected val isNarrow = vecCtrl.isNarrow 31 protected val isExt = vecCtrl.isExt 32 protected val isMove = vecCtrl.isMove 33 protected val isReverse = vecCtrl.isReverse 34 35 private val allMaskTrue = VecInit(Seq.fill(VLEN)(true.B)).asUInt 36 37 // There is no difference between control-dependency or data-dependency for function unit, 38 // but spliting these in ctrl or data bundles is easy to coding. 39 protected val srcMask = if(!cfg.maskWakeUp) inCtrl.vpu.get.vmask else Mux(vm, allMaskTrue, inData.getSrcMask) 40 protected val srcVConfig = if(!cfg.vconfigWakeUp) inCtrl.vpu.get.vconfig else inData.getSrcVConfig.asTypeOf(new VConfig) 41 42 // swap vs1 and vs2, used by vrsub, etc 43 protected val needReverse = VialuFixType.needReverse(inCtrl.fuOpType) 44 // vadc.vv, vsbc.vv need this 45 protected val needClearMask = VialuFixType.needClearMask(inCtrl.fuOpType) 46} 47 48class VecPipedFuncUnit(cfg: FuConfig)(implicit p: Parameters) extends FuncUnit(cfg) 49 with HasPipelineReg 50 with VecFuncUnitAlias 51{ 52 private val extedVs1 = Wire(UInt(VLEN.W)) 53 54 // modules 55 private val scalaDupToVector = Module(new ScalaDupToVector(VLEN)) 56 57 scalaDupToVector.io.in.scalaData := inData.src(0) 58 scalaDupToVector.io.in.vsew := vsew 59 extedVs1 := scalaDupToVector.io.out.vecData 60 61 private val src0 = Mux(vecCtrl.needScalaSrc, extedVs1, inData.src(0)) // vs1, rs1, fs1, imm 62 private val src1 = WireInit(inData.src(1)) // vs2 only 63 64 protected val vs2 = Mux(needReverse, src0, src1) 65 protected val vs1 = Mux(needReverse, src1, src0) 66 protected val old_vd = inData.src(2) 67 68 override def latency: Int = cfg.latency.latencyVal.get 69 70} 71