1package xiangshan.backend.fu.NewCSR 2 3import chisel3._ 4import xiangshan.backend.fu.NewCSR.CSRDefines._ 5import xiangshan.backend.fu.NewCSR.CSRFunc._ 6 7import scala.collection.immutable.SeqMap 8 9trait Unprivileged { self: NewCSR with MachineLevel with SupervisorLevel => 10 11 val fcsr = Module(new CSRModule("Fcsr", new CSRBundle { 12 val NX = CSRWARLField(0, wNoFilter) 13 val UF = CSRWARLField(1, wNoFilter) 14 val OF = CSRWARLField(2, wNoFilter) 15 val DZ = CSRWARLField(3, wNoFilter) 16 val NV = CSRWARLField(4, wNoFilter) 17 val FRM = CSRWARLField(7, 5, wNoFilter) 18 }) { 19 val wAliasFflags = IO(Input(new CSRAddrWriteBundle(new CSRBundle { 20 val NX = CSRWARLField(0, wNoFilter) 21 val UF = CSRWARLField(1, wNoFilter) 22 val OF = CSRWARLField(2, wNoFilter) 23 val DZ = CSRWARLField(3, wNoFilter) 24 val NV = CSRWARLField(4, wNoFilter) 25 }))) 26 val wAliasFfm = IO(Input(new CSRAddrWriteBundle(new CSRBundle { 27 val FRM = CSRWARLField(2, 0, wNoFilter) 28 }))) 29 val fflags = IO(Output(UInt(64.W))) 30 val frm = IO(Output(UInt(64.W))) 31 32 // write connection 33 this.wfn(reg)(Seq(wAliasFflags, wAliasFfm)) 34 35 // read connection 36 fflags := reg.asUInt(4, 0) 37 frm := reg.FRM.asUInt 38 }) 39 40 val unprivilegedCSRMap: SeqMap[Int, (CSRAddrWriteBundle[_], Data)] = SeqMap( 41 0x001 -> (fcsr.wAliasFflags -> fcsr.fflags), 42 0x002 -> (fcsr.wAliasFfm -> fcsr.frm), 43 0x003 -> (fcsr.w -> fcsr.rdata), 44 ) 45 46 val unprivilegedCSRMods: Seq[CSRModule[_]] = Seq( 47 fcsr, 48 ) 49 50 val unprivilegedCSROutMap: SeqMap[Int, UInt] = SeqMap( 51 0x001 -> fcsr.fflags.asUInt, 52 0x002 -> fcsr.frm.asUInt, 53 0x003 -> fcsr.rdata.asUInt, 54 ) 55} 56