xref: /XiangShan/src/main/scala/xiangshan/backend/fu/NewCSR/CSRBundles.scala (revision 039cdc35f5f3b68b6295ec5ace90f22a77322e02)
1package xiangshan.backend.fu.NewCSR
2
3import chisel3._
4import xiangshan.backend.fu.NewCSR.CSRDefines.{
5  XtvecMode,
6  CSRROField => RO,
7  CSRRWField => RW,
8  CSRWARLField => WARL,
9}
10import xiangshan.backend.fu.NewCSR.CSRFunc._
11
12object CSRBundles {
13  class XtvecBundle extends CSRBundle {
14    val mode = XtvecMode(1, 0, wNoFilter)
15    val addr = WARL(63, 2, wNoFilter)
16  }
17
18  class CauseBundle extends CSRBundle {
19    val Interrupt = RW(63)
20    val ExceptionCode = RW(62, 0)
21  }
22
23  class Counteren extends CSRBundle {
24    val CY = RW(0)
25    val TM = RW(1)
26    val IR = RW(2)
27    val HPM = RW(31, 3)
28  }
29
30  class OneFieldBundle extends CSRBundle {
31    val ALL = RW(63, 0)
32  }
33
34  class Envcfg extends CSRBundle {
35    val STCE  = RO(    63).withReset(0.U)
36    val PBMTE = RO(    62).withReset(0.U)
37    val ADUE  = RO(    61).withReset(0.U)
38    val PMM   = RO(33, 32).withReset(0.U)
39    val CBZE  = RO(     7).withReset(0.U)
40    val CBCFE = RO(     6).withReset(0.U)
41    val CBIE  = RO( 5,  4).withReset(0.U)
42    val FIOM  = RO(     0).withReset(0.U)
43  }
44}
45