xref: /XiangShan/src/main/scala/top/YamlParser.scala (revision 30f35717e23156cb95b30a36db530384545b48a4) 
1/***************************************************************************************
2* Copyright (c) 2025 Beijing Institute of Open Source Chip (BOSC)
3* Copyright (c) 2025 Institute of Computing Technology, Chinese Academy of Sciences
4*
5* XiangShan is licensed under Mulan PSL v2.
6* You can use this software according to the terms and conditions of the Mulan PSL v2.
7* You may obtain a copy of Mulan PSL v2 at:
8*          http://license.coscl.org.cn/MulanPSL2
9*
10* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
11* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
12* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
13*
14* See the Mulan PSL v2 for more details.
15***************************************************************************************/
16
17package top
18
19import io.circe.generic.extras.Configuration
20import io.circe.generic.extras.auto._
21
22import aia.IMSICParams
23import org.chipsalliance.cde.config.Parameters
24import system.SoCParamsKey
25import xiangshan.backend.fu.{MemoryRange, PMAConfigEntry}
26import xiangshan.XSTileKey
27import freechips.rocketchip.devices.debug.DebugModuleKey
28import freechips.rocketchip.diplomacy.AddressSet
29import freechips.rocketchip.util.AsyncQueueParams
30import device.IMSICBusType
31
32case class YamlConfig(
33  PmemRanges: Option[List[MemoryRange]],
34  PMAConfigs: Option[List[PMAConfigEntry]],
35  EnableCHIAsyncBridge: Option[Boolean],
36  L2CacheConfig: Option[L2CacheConfig],
37  L3CacheConfig: Option[L3CacheConfig],
38  DebugModuleBaseAddr: Option[BigInt],
39  WFIResume: Option[Boolean],
40  SeperateDM: Option[Boolean],
41  SeperateTLBus: Option[Boolean],
42  SeperateTLBusRanges: Option[List[AddressSet]],
43  IMSICBusType: Option[String],
44  IMSICParams: Option[IMSICParams],
45)
46
47object YamlParser {
48  implicit val customParserConfig: Configuration = Configuration.default.withDefaults
49  def parseYaml(config: Parameters, yamlFile: String): Parameters = {
50    val yaml = scala.io.Source.fromFile(yamlFile).mkString
51    val json = io.circe.yaml.parser.parse(yaml) match {
52      case Left(value) => throw value
53      case Right(value) => value
54    }
55    val yamlConfig = json.as[YamlConfig] match {
56      case Left(value) => throw value
57      case Right(value) => value
58    }
59    var newConfig = config
60    yamlConfig.PmemRanges.foreach { ranges =>
61      newConfig = newConfig.alter((site, here, up) => {
62        case SoCParamsKey => up(SoCParamsKey).copy(PmemRanges = ranges)
63      })
64    }
65    yamlConfig.PMAConfigs.foreach { pmaConfigs =>
66      newConfig = newConfig.alter((site, here, up) => {
67        case SoCParamsKey => up(SoCParamsKey).copy(PMAConfigs = pmaConfigs)
68      })
69    }
70    yamlConfig.EnableCHIAsyncBridge.foreach { enable =>
71      newConfig = newConfig.alter((site, here, up) => {
72        case SoCParamsKey => up(SoCParamsKey).copy(
73          EnableCHIAsyncBridge = Option.when(enable)(AsyncQueueParams(depth = 16, sync = 3, safe = false))
74        )
75      })
76    }
77    yamlConfig.L2CacheConfig.foreach(l2 => newConfig = newConfig.alter(l2))
78    yamlConfig.L3CacheConfig.foreach(l3 => newConfig = newConfig.alter(l3))
79    yamlConfig.DebugModuleBaseAddr.foreach { addr =>
80      newConfig = newConfig.alter((site, here, up) => {
81        case DebugModuleKey => up(DebugModuleKey).map(_.copy(baseAddress = addr))
82      })
83    }
84    yamlConfig.WFIResume.foreach { enable =>
85      newConfig = newConfig.alter((site, here, up) => {
86        case XSTileKey => up(XSTileKey).map(_.copy(wfiResume = enable))
87      })
88    }
89    yamlConfig.SeperateDM.foreach { enable =>
90      newConfig = newConfig.alter((site, here, up) => {
91        case SoCParamsKey => up(SoCParamsKey).copy(SeperateDM = enable)
92      })
93    }
94    yamlConfig.SeperateTLBus.foreach { enable =>
95      newConfig = newConfig.alter((site, here, up) => {
96        case SoCParamsKey => up(SoCParamsKey).copy(SeperateTLBus = enable)
97      })
98    }
99    yamlConfig.SeperateTLBusRanges.foreach { ranges =>
100      newConfig = newConfig.alter((site, here, up) => {
101        case SoCParamsKey => up(SoCParamsKey).copy(SeperateTLBusRanges = ranges)
102      })
103    }
104    yamlConfig.IMSICBusType.foreach { busType =>
105      newConfig = newConfig.alter((site, here, up) => {
106        case SoCParamsKey => up(SoCParamsKey).copy(IMSICBusType = device.IMSICBusType.withName(busType))
107      })
108    }
109    yamlConfig.IMSICParams.foreach { params =>
110      newConfig = newConfig.alter((site, here, up) => {
111        case SoCParamsKey => up(SoCParamsKey).copy(IMSICParams = params)
112      })
113    }
114    newConfig
115  }
116}
117