1/*************************************************************************************** 2* Copyright (c) 2025 Beijing Institute of Open Source Chip (BOSC) 3* Copyright (c) 2025 Institute of Computing Technology, Chinese Academy of Sciences 4* 5* XiangShan is licensed under Mulan PSL v2. 6* You can use this software according to the terms and conditions of the Mulan PSL v2. 7* You may obtain a copy of Mulan PSL v2 at: 8* http://license.coscl.org.cn/MulanPSL2 9* 10* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, 11* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, 12* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE. 13* 14* See the Mulan PSL v2 for more details. 15***************************************************************************************/ 16 17package top 18 19import io.circe.generic.extras.Configuration 20import io.circe.generic.extras.auto._ 21 22import org.chipsalliance.cde.config.Parameters 23import system.SoCParamsKey 24import xiangshan.backend.fu.{MemoryRange, PMAConfigEntry} 25import freechips.rocketchip.devices.debug.DebugModuleKey 26import freechips.rocketchip.util.AsyncQueueParams 27import freechips.rocketchip.diplomacy.AddressSet 28 29case class YamlConfig( 30 PmemRanges: Option[List[MemoryRange]], 31 PMAConfigs: Option[List[PMAConfigEntry]], 32 EnableCHIAsyncBridge: Option[Boolean], 33 L2CacheConfig: Option[L2CacheConfig], 34 L3CacheConfig: Option[L3CacheConfig], 35 DebugModuleBaseAddr: Option[BigInt], 36 SeperateDM: Option[Boolean], 37 SeperateTLBus: Option[Boolean], 38 SeperateTLBusRanges: Option[List[AddressSet]] 39) 40 41object YamlParser { 42 implicit val customParserConfig: Configuration = Configuration.default.withDefaults 43 def parseYaml(config: Parameters, yamlFile: String): Parameters = { 44 val yaml = scala.io.Source.fromFile(yamlFile).mkString 45 val json = io.circe.yaml.parser.parse(yaml) match { 46 case Left(value) => throw value 47 case Right(value) => value 48 } 49 val yamlConfig = json.as[YamlConfig] match { 50 case Left(value) => throw value 51 case Right(value) => value 52 } 53 var newConfig = config 54 yamlConfig.PmemRanges.foreach { ranges => 55 newConfig = newConfig.alter((site, here, up) => { 56 case SoCParamsKey => up(SoCParamsKey).copy(PmemRanges = ranges) 57 }) 58 } 59 yamlConfig.PMAConfigs.foreach { pmaConfigs => 60 newConfig = newConfig.alter((site, here, up) => { 61 case SoCParamsKey => up(SoCParamsKey).copy(PMAConfigs = pmaConfigs) 62 }) 63 } 64 yamlConfig.EnableCHIAsyncBridge.foreach { enable => 65 newConfig = newConfig.alter((site, here, up) => { 66 case SoCParamsKey => up(SoCParamsKey).copy( 67 EnableCHIAsyncBridge = Option.when(enable)(AsyncQueueParams(depth = 16, sync = 3, safe = false)) 68 ) 69 }) 70 } 71 yamlConfig.L2CacheConfig.foreach(l2 => newConfig = newConfig.alter(l2)) 72 yamlConfig.L3CacheConfig.foreach(l3 => newConfig = newConfig.alter(l3)) 73 yamlConfig.DebugModuleBaseAddr.foreach { addr => 74 newConfig = newConfig.alter((site, here, up) => { 75 case DebugModuleKey => up(DebugModuleKey).map(_.copy(baseAddress = addr)) 76 }) 77 } 78 yamlConfig.SeperateDM.foreach { enable => 79 newConfig = newConfig.alter((site, here, up) => { 80 case SoCParamsKey => up(SoCParamsKey).copy(SeperateDM = enable) 81 }) 82 } 83 yamlConfig.SeperateTLBus.foreach { enable => 84 newConfig = newConfig.alter((site, here, up) => { 85 case SoCParamsKey => up(SoCParamsKey).copy(SeperateTLBus = enable) 86 }) 87 } 88 yamlConfig.SeperateTLBusRanges.foreach { ranges => 89 newConfig = newConfig.alter((site, here, up) => { 90 case SoCParamsKey => up(SoCParamsKey).copy(SeperateTLBusRanges = ranges) 91 }) 92 } 93 newConfig 94 } 95} 96