xref: /XiangShan/src/main/scala/device/AXI4Flash.scala (revision f8d0b1072a8a0360965e97879bb8224911caa4dc)
1/***************************************************************************************
2* Copyright (c) 2020-2021 Institute of Computing Technology, Chinese Academy of Sciences
3* Copyright (c) 2020-2021 Peng Cheng Laboratory
4*
5* XiangShan is licensed under Mulan PSL v2.
6* You can use this software according to the terms and conditions of the Mulan PSL v2.
7* You may obtain a copy of Mulan PSL v2 at:
8*          http://license.coscl.org.cn/MulanPSL2
9*
10* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
11* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
12* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
13*
14* See the Mulan PSL v2 for more details.
15***************************************************************************************/
16
17package device
18
19import chisel3._
20import chisel3.util._
21import difftest.common.DifftestFlash
22import org.chipsalliance.cde.config.Parameters
23import freechips.rocketchip.diplomacy.AddressSet
24
25class AXI4Flash
26(
27  address: Seq[AddressSet]
28)(implicit p: Parameters)
29  extends AXI4SlaveModule(address, executable = false)
30{
31
32  override lazy val module = new AXI4SlaveModuleImp(this){
33    val beatBits = log2Ceil(node.portParams.head.beatBytes)
34    def getOffset(addr: UInt) = Cat(addr(15, beatBits), 0.U(beatBits.W))
35
36    val flash = DifftestFlash()
37    flash.en := in.ar.fire
38    flash.addr := Cat(0.U(16.W), getOffset(raddr))
39
40    in.r.bits.data := flash.data
41  }
42}
43