1*51981c77SbugGenerator# only generate a small module: example 2*51981c77SbugGeneratorverilog-decode: 3*51981c77SbugGenerator mill -i XiangShan.test.runMain xiangshan.DecodeMain -td build --output-file DecodeUnit.v 4*51981c77SbugGenerator 5*51981c77SbugGenerator# chiseltest 6*51981c77SbugGenerator# autorun all the chiselTest case 7*51981c77SbugGeneratortest: 8*51981c77SbugGenerator mill -i XiangShan.test.test 9*51981c77SbugGenerator 10*51981c77SbugGenerator# only run DecodeUnitTest 11*51981c77SbugGeneratortest-DecodeUnit: 12*51981c77SbugGenerator mill -i XiangShan.test.testOnly xiangshan.DecodeUnitTest 13