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/linux-6.14.4/arch/parisc/kernel/
Dperf_asm.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /* low-level asm for "intrigue" (PA8500-8700 CPU perf counters)
5 * Copyright (C) 2001 Randolph Chung <tausq at parisc-linux.org>
6 * Copyright (C) 2001 Hewlett-Packard (Grant Grundler)
46 sync ; follow ERS
100 ;* %r24 - original DR2 value
101 ;* %r1 - scratch
102 ;* %r29 - scratch
117 ; NOTE: The PCX-W ERS states that DR2_SLOW_RET must be set before any
132 ; Cacheline start (32-byte cacheline)
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/linux-6.14.4/drivers/tty/serial/
Dip22zilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
32 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
38 /* Write Register 0 */
69 /* Write Register 1 */
85 /* Write Register #2 (Interrupt Vector) */
87 /* Write Register 3 */
90 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
101 /* Write Register 4 */
106 #define SYNC_ENAB 0 /* Sync Modes Enable */
111 #define MONSYNC 0 /* 8 Bit Sync character */
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Dsunzilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
24 #define BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
30 /* Write Register 0 */
61 /* Write Register 1 */
77 /* Write Register #2 (Interrupt Vector) */
79 /* Write Register 3 */
82 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
93 /* Write Register 4 */
98 #define SYNC_ENAB 0 /* Sync Modes Enable */
103 #define MONSYNC 0 /* 8 Bit Sync character */
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Dzs.h1 /* SPDX-License-Identifier: GPL-2.0 */
34 u8 regs[ZS_NUM_REGS]; /* Channel write registers. */
38 * Per-SCC state for locking and the interrupt handler.
53 #define ZS_BPS_TO_BRG(bps, freq) ((((freq) + (bps)) / (2 * (bps))) - 2)
59 /* Write Register 0 (Command) */
90 /* Write Register 1 (Tx/Rx/Ext Int Enable and WAIT/DMA Commands) */
105 /* Write Register 2 (Interrupt Vector) */
107 /* Write Register 3 (Receive Parameters and Control) */
109 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
120 /* Write Register 4 (Transmit/Receive Miscellaneous Parameters and Modes) */
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Dpmac_zilog.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 * of "escc" node (ie. ch-a or ch-b)
64 if (uap->flags & PMACZILOG_FLAG_IS_CHANNEL_A) in pmz_get_port_A()
66 return uap->mate; in pmz_get_port_A()
78 writeb(reg, port->control_reg); in read_zsreg()
79 return readb(port->control_reg); in read_zsreg()
85 writeb(reg, port->control_reg); in write_zsreg()
86 writeb(value, port->control_reg); in write_zsreg()
91 return readb(port->data_reg); in read_zsdata()
96 writeb(data, port->data_reg); in write_zsdata()
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/linux-6.14.4/drivers/net/hamradio/
Dz8530.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 /* Write Register 0 */
37 /* Write Register 1 */
52 /* Write Register #2 (Interrupt Vector) */
54 /* Write Register 3 */
57 #define SYNC_L_INH 0x2 /* Sync Character Load Inhibit */
67 /* Write Register 4 */
72 #define SYNC_ENAB 0 /* Sync Modes Enable */
77 #define MONSYNC 0 /* 8 Bit Sync character */
78 #define BISYNC 0x10 /* 16 bit sync character */
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/linux-6.14.4/fs/
Dsync.c1 // SPDX-License-Identifier: GPL-2.0
3 * High-level sync()-related operations
19 #include <linux/backing-dev.h>
26 * Write out and wait upon all dirty data associated with this
38 WARN_ON(!rwsem_is_locked(&sb->s_umount)); in sync_filesystem()
41 * No point in syncing out anything if the filesystem is read-only. in sync_filesystem()
51 * methods call sync_dirty_buffer() and thus effectively write one block in sync_filesystem()
55 if (sb->s_op->sync_fs) { in sync_filesystem()
56 ret = sb->s_op->sync_fs(sb, 0); in sync_filesystem()
60 ret = sync_blockdev_nowait(sb->s_bdev); in sync_filesystem()
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/linux-6.14.4/Documentation/sound/cards/
Dhdspm.rst2 Software Interface ALSA-DSP MADI Driver
5 (translated from German, so no good English ;-),
7 2004 - winfried ritsch
11 the Controls and startup-options are ALSA-Standard and only the
19 ------------------
21 * number of channels -- depends on transmission mode
29 * Single Speed -- 1..64 channels
37 * Double Speed -- 1..32 channels
40 Note: Choosing the 56-channel mode for
41 transmission/receive-mode , only 28 are transmitted/received
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/linux-6.14.4/include/uapi/linux/
Ddma-buf.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
26 * struct dma_buf_sync - Synchronize with CPU access.
29 * possible to guarantee coherency between the CPU-visible map and underlying
35 * with DMA_BUF_SYNC_START and the appropriate read/write flags. Once the
37 * DMA_BUF_SYNC_END and the same read/write flags.
45 * follow-up work is not submitted to GPU or other device driver until
89 * struct dma_buf_export_sync_file - Get a sync_file from a dma-buf
92 * current set of fences on a dma-buf file descriptor as a sync_file. CPU
93 * waits via poll() or other driver-specific mechanisms typically wait on
94 * whatever fences are on the dma-buf at the time the wait begins. This
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/linux-6.14.4/include/linux/firmware/intel/
Dstratix10-smc.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2017-2018, Intel Corporation
9 #include <linux/arm-smccc.h>
19 * An ARM SMC instruction takes a function identifier and up to 6 64-bit
20 * register values as arguments, and can return up to 4 64-bit register
31 * STD call starts a operation which can be preempted by a non-secure
81 * Sync call used by service driver at EL1 to request the FPGA in EL3 to
88 * a2-7: not used.
92 * a1-3: not used.
108 * a3-7: not used.
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/linux-6.14.4/drivers/power/supply/
Dda9150-fg.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DA9150 Fuel-Gauge Driver
22 #include <linux/devm-helpers.h>
61 /* QIF Sync Timeout */
99 da9150_read_qif(fg->da9150, read_addr, size, buf); in da9150_fg_read_attr()
114 /* Set QIF code (WRITE mode) */ in da9150_fg_write_attr()
121 da9150_write_qif(fg->da9150, write_addr, size, buf); in da9150_fg_write_attr()
124 /* Trigger QIF Sync to update QIF readable data */
130 mutex_lock(&fg->io_lock); in da9150_fg_read_sync_start()
132 /* Check if QIF sync already requested, and write to sync if not */ in da9150_fg_read_sync_start()
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/linux-6.14.4/Documentation/admin-guide/cgroup-v1/
Dblkio-controller.rst22 -----------------------------
33 mount -t cgroup -o blkio none /sys/fs/cgroup/blkio
98 --------------------------------
106 see Documentation/block/bfq-iosched.rst.
110 weight. For more details, see Documentation/block/bfq-iosched.rst.
152 are further divided by the type of operation - read or write, sync
159 are further divided by the type of operation - read or write, sync
173 the type of operation - read or write, sync or async. First two fields
186 (there might be a time lag here due to re-ordering of requests by the
188 devices too. This time is further divided by the type of operation -
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/linux-6.14.4/tools/testing/selftests/arm64/mte/
Dcheck_buffer_fill.c1 // SPDX-License-Identifier: GPL-2.0
17 1, 555, 1033, MT_GRANULE_SIZE - 1, MT_GRANULE_SIZE,
18 /* page size - 1*/ 0, /* page_size */ 0, /* page size + 1 */ 0
80 mte_initialize_current_context(mode, (uintptr_t)ptr, -underflow_range); in check_buffer_underflow_by_byte()
83 for (j = sizes[i] - 1; (j >= -underflow_range) && in check_buffer_underflow_by_byte()
84 (!cur_mte_cxt.fault_valid); j--) { in check_buffer_underflow_by_byte()
104 if (cur_mte_cxt.fault_valid == true || last_index != -underflow_range) { in check_buffer_underflow_by_byte()
109 und_ptr = (char *) MT_CLEAR_TAG((size_t) ptr - underflow_range); in check_buffer_underflow_by_byte()
124 * The imprecise fault is checked after the write to the buffer, in check_buffer_underflow_by_byte()
137 if (!cur_mte_cxt.fault_valid || (last_index != (-1))) { in check_buffer_underflow_by_byte()
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Dcheck_user_mem.c1 // SPDX-License-Identifier: GPL-2.0
49 if (fd == -1) in check_usermem_access_fault()
52 if (write(fd, &val, sizeof(val)) != sizeof(val)) in check_usermem_access_fault()
74 tag_len = len - tag_offset; in check_usermem_access_fault()
92 syscall_len = write(fd, ptr + ptroff, size); in check_usermem_access_fault()
114 * Accessing user memory in kernel with invalid tag should fail in sync in check_usermem_access_fault()
142 void format_test_name(char* name, int name_len, int type, int sync, int map, int len, int offset) { in format_test_name() argument
152 test_type = "write"; in format_test_name()
165 switch (sync) { in format_test_name()
224 int sync = mte_sync[s]; in main() local
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/linux-6.14.4/Documentation/driver-api/memory-devices/
Dti-gpmc.rst1 .. SPDX-License-Identifier: GPL-2.0
14 * Pseudo-SRAM devices
65 2. sync common
85 4. read async non-muxed
96 5. read sync muxed
107 6. read sync non-muxed
118 7. write async muxed
131 8. write async non-muxed
144 9. write sync muxed
157 10. write sync non-muxed
/linux-6.14.4/drivers/gpu/drm/i915/gt/
Dgen6_engine_cs.c1 // SPDX-License-Identifier: MIT
18 * Emits a PIPE_CONTROL with a non-zero post-sync operation, for
22 * [DevSNB-C+{W/A}] Before any depth stall flush (including those
23 * produced by non-pipelined state commands), software needs to first
24 * send a PIPE_CONTROL with no bits set except Post-Sync Operation !=
27 * [Dev-SNB{W/A}]: Before a PIPE_CONTROL with Write Cache Flush Enable
28 * =1, a PIPE_CONTROL with any non-zero post-sync-op is required.
32 * [Dev-SNB{W/A}]: Pipe-control with CS-stall bit set must be sent
33 * BEFORE the pipe-control with a post-sync op and no write-cache
41 * - Render Target Cache Flush Enable ([12] of DW1)
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/linux-6.14.4/fs/ubifs/
Djournal.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2006-2008 Nokia Corporation.
14 * The journal consists of 2 parts - the log and bud LEBs. The log has fixed
16 * area. Buds contain file system data - data nodes, inode nodes, etc. The log
24 * The journal is multi-headed because we want to write data to the journal as
26 * in one LEB, so we may write data owned by different inodes to different
33 * Bud LEBs may be half-indexed. For example, if the bud was not full at the
43 * All the journal write operations like 'ubifs_jnl_update()' here, which write
52 * zero_ino_node_unused - zero out unused fields of an on-flash inode node.
57 memset(ino->padding1, 0, 4); in zero_ino_node_unused()
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/linux-6.14.4/fs/jfs/
Djfs_logmgr.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) International Business Machines Corp., 2000-2004
4 * Portions Copyright (C) Christoph Hellwig, 2001-2002
24 * transactions which wrote COMMIT records in the same in-memory
33 * . a per log lock serialize log write.
38 * careful-write (ping-pong) of last logpage to recover from crash
40 * detection of split (out-of-order) write of physical sectors
45 * lsn - 64-bit monotonically increasing integer vs
46 * 32-bit lspn and page eor.
78 * log read/write serialization (per log)
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/linux-6.14.4/drivers/gpu/drm/amd/amdgpu/
Damdgpu_vm_cpu.c28 * amdgpu_vm_cpu_map_table - make sure new PDs/PTs are kmapped
34 table->bo.flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED; in amdgpu_vm_cpu_map_table()
35 return amdgpu_bo_kmap(&table->bo, NULL); in amdgpu_vm_cpu_map_table()
39 * amdgpu_vm_cpu_prepare - prepare page table update with the CPU
42 * @sync: sync obj with fences to wait on
48 struct amdgpu_sync *sync) in amdgpu_vm_cpu_prepare() argument
50 if (!sync) in amdgpu_vm_cpu_prepare()
53 return amdgpu_sync_wait(sync, true); in amdgpu_vm_cpu_prepare()
57 * amdgpu_vm_cpu_update - helper to update page tables via CPU
62 * @addr: dst addr to write into pe
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/linux-6.14.4/sound/core/seq/oss/
Dseq_oss_writeq.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * seq_oss_writeq.c - write queue and sync
22 * create a write queue record
33 q->dp = dp; in snd_seq_oss_writeq_new()
34 q->maxlen = maxlen; in snd_seq_oss_writeq_new()
35 spin_lock_init(&q->sync_lock); in snd_seq_oss_writeq_new()
36 q->sync_event_put = 0; in snd_seq_oss_writeq_new()
37 q->sync_time = 0; in snd_seq_oss_writeq_new()
38 init_waitqueue_head(&q->sync_sleep); in snd_seq_oss_writeq_new()
41 pool.client = dp->cseq; in snd_seq_oss_writeq_new()
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/linux-6.14.4/drivers/rtc/
Drtc-ti-k3.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2021-2022 Texas Instruments Incorporated - https://www.ti.com/
46 #define K3RTC_MIN_OFFSET (-277761)
50 .name = "peripheral-registers",
107 * struct ti_k3_rtc - Private data for ti-k3-rtc
109 * @sync_timeout_us: data sync timeout period in uSec
129 ret = regmap_field_read(priv->r_fields[f], &val); in k3rtc_field_read()
141 regmap_field_write(priv->r_fields[f], val); in k3rtc_field_write()
145 * k3rtc_fence - Ensure a register sync took place between the two domains
148 * Return: 0 if the sync took place, else returns -ETIMEDOUT
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/linux-6.14.4/drivers/gpu/drm/radeon/
Dr600_dma.c43 * r600_dma_get_rptr - get the current read pointer
55 if (rdev->wb.enabled) in r600_dma_get_rptr()
56 rptr = rdev->wb.wb[ring->rptr_offs/4]; in r600_dma_get_rptr()
64 * r600_dma_get_wptr - get the current write pointer
78 * r600_dma_set_wptr - commit the write pointer
83 * Write the wptr back to the hardware (r6xx+).
88 WREG32(DMA_RB_WPTR, (ring->wptr << 2) & 0x3fffc); in r600_dma_set_wptr()
92 * r600_dma_stop - stop the async dma engine
96 * Stop the async dma engine (r6xx-evergreen).
102 if (rdev->asic->copy.copy_ring_index == R600_RING_TYPE_DMA_INDEX) in r600_dma_stop()
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/linux-6.14.4/arch/csky/include/asm/
Dbarrier.h1 /* SPDX-License-Identifier: GPL-2.0 */
22 * w: write
69 * sync: completion barrier, all sync.xx instructions
71 * made by ld/st instructions before sync.s
72 * sync.s: inherit from sync, but also shareable to other cores
73 * sync.i: inherit from sync, but also flush cpu pipeline
74 * sync.is: the same with sync.i + sync.s
76 #define mb() asm volatile ("sync\n":::"memory")
80 * Using three sync.is to prevent speculative PTW
82 #define sync_is() asm volatile ("sync.is\nsync.is\nsync.is\n":::"memory")
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/linux-6.14.4/drivers/md/
Ddm-raid1.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2005-2008 Red Hat, Inc. All rights reserved.
9 #include "dm-bio-record.h"
17 #include <linux/device-mapper.h>
18 #include <linux/dm-io.h>
19 #include <linux/dm-dirty-log.h>
20 #include <linux/dm-kcopyd.h>
21 #include <linux/dm-region-hash.h>
33 #define errors_handled(p) ((p)->features & DM_RAID1_HANDLE_ERRORS)
34 #define keep_log(p) ((p)->features & DM_RAID1_KEEP_LOG)
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/linux-6.14.4/Documentation/devicetree/bindings/memory-controllers/
Dti,gpmc-child.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <[email protected]>
11 - Roger Quadros <[email protected]>
24 gpmc,sync-clk-ps:
28 # Chip-select signal timings corresponding to GPMC_CONFIG2:
29 gpmc,cs-on-ns:
33 gpmc,cs-rd-off-ns:
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