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/linux-6.14.4/Documentation/devicetree/bindings/interrupt-controller/
Drealtek,rtl-intc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/realtek,rtl-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Realtek RTL SoC interrupt controller
18 - Birger Koblitz <mail@birger-koblitz.de>
19 - Bert Vermeulen <[email protected]>
20 - John Crispin <[email protected]>
25 - items:
26 - enum:
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/linux-6.14.4/arch/mips/boot/dts/realtek/
Drtl930x.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
6 compatible = "realtek,rtl9302-soc";
9 #address-cells = <1>;
10 #size-cells = <0>;
17 clock-names = "cpu";
21 baseclk: clock-800mhz {
22 compatible = "fixed-clock";
23 #clock-cells = <0>;
24 clock-frequency = <800000000>;
27 lx_clk: clock-175mhz {
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/linux-6.14.4/drivers/irqchip/
Dirq-realtek-rtl.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020 Birger Koblitz <mail@birger-koblitz.de>
32 * IRR0-IRR3 store 4 bits per interrupt, but Realtek uses inverted numbering,
37 #define IRR_OFFSET(idx) (4 * (3 - (idx * 4) / 32))
59 value |= BIT(i->hwirq); in realtek_ictl_unmask_irq()
73 value &= ~BIT(i->hwirq); in realtek_ictl_mask_irq()
80 .name = "realtek-rtl-intc",
135 return -ENXIO; in realtek_rtl_of_init()
146 * all known hardware anyway. "interrupt-map" is deprecated, so in realtek_rtl_of_init()
149 oirq.np = of_find_compatible_node(NULL, NULL, "mti,cpu-interrupt-controller"); in realtek_rtl_of_init()
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_IRQCHIP) += irqchip.o
4 obj-$(CONFIG_AL_FIC) += irq-al-fic.o
5 obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o
6 obj-$(CONFIG_ATH79) += irq-ath79-cpu.o
7 obj-$(CONFIG_ATH79) += irq-ath79-misc.o
8 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
9 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
10 obj-$(CONFIG_ARCH_ACTIONS) += irq-owl-sirq.o
11 obj-$(CONFIG_DAVINCI_CP_INTC) += irq-davinci-cp-intc.o
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/linux-6.14.4/arch/riscv/boot/dts/microchip/
Dmpfs.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
5 #include "dt-bindings/clock/microchip,mpfs-clock.h"
8 #address-cells = <2>;
9 #size-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
16 timebase-frequency = <1000000>;
21 i-cache-block-size = <64>;
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/linux-6.14.4/arch/arc/plat-hsdk/
Dplatform.c1 // SPDX-License-Identifier: GPL-2.0-only
33 * Peripherals on CPU Card are wired to cpu intc via intermediate in hsdk_enable_gpio_intc_wire()
36 * --------------------- in hsdk_enable_gpio_intc_wire()
37 * | snps,archs-intc | in hsdk_enable_gpio_intc_wire()
38 * --------------------- in hsdk_enable_gpio_intc_wire()
40 * ---------------------- in hsdk_enable_gpio_intc_wire()
41 * | snps,archs-idu-intc | in hsdk_enable_gpio_intc_wire()
42 * ---------------------- in hsdk_enable_gpio_intc_wire()
46 * ------------------- in hsdk_enable_gpio_intc_wire()
47 * | snps,dw-apb-intc | in hsdk_enable_gpio_intc_wire()
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/linux-6.14.4/arch/sh/kernel/
Dhead_32.S1 /* SPDX-License-Identifier: GPL-2.0
42 .skip PAGE_SIZE - empty_zero_page - 1b
50 * INTC may or may not be initialized.
54 * Hardware (including on-chip modules) may or may not be initialized.
74 * We do this early on for SH-4A as a micro-optimization,
93 * When we boot in 32-bit MMU mode there are 2 PMB entries already
97 * ---------------------------------------------------------------
117 * mapping are unsupported in 32-bit mode and must specify their caching
296 * Don't clear BSS if running on slow platforms such as an RTL simulation,
313 mov.l r0,@-r2
/linux-6.14.4/drivers/of/
Dirq.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 1995-1996 Gary Thomas ([email protected])
8 * Copyright (C) 1996-2001 Cort Dougan
32 * irq_of_parse_and_map - Parse and map an interrupt into linux virq space
55 * of_irq_find_parent - Given a device node, find its interrupt parent node
70 if (of_property_read_u32(child, "interrupt-parent", &parent)) { in of_irq_find_parent()
80 } while (p && of_get_property(p, "#interrupt-cells", NULL) == NULL); in of_irq_find_parent()
87 * These interrupt controllers abuse interrupt-map for unspeakable
90 * non-sensical interrupt-map that is better left ignored.
97 "CBEA,platform-spider-pic",
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/linux-6.14.4/drivers/net/dsa/realtek/
Drtl8366rb.c1 // SPDX-License-Identifier: GPL-2.0
9 * Copyright (C) 2009-2010 Gabor Juhos <[email protected]>
27 #include "realtek-smi.h"
28 #include "realtek-mdio.h"
47 /* Switch per-port learning disablement register */
160 * VID such as untagged or priority-tagged frames for respective
163 * a C-tag with VID != 0 for respective port.
363 mib->offset; in rtl8366rb_get_mib_counter()
368 ret = regmap_write(priv->map, addr, 0); /* Write whatever */ in rtl8366rb_get_mib_counter()
373 ret = regmap_read(priv->map, RTL8366RB_MIB_CTRL_REG, &val); in rtl8366rb_get_mib_counter()
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/linux-6.14.4/arch/arc/kernel/
Dperf_event.c1 // SPDX-License-Identifier: GPL-2.0+
6 // Copyright (C) 2013-2018 Synopsys, Inc. (www.synopsys.com)
38 * (based on a specific RTL build)
61 [PERF_COUNT_ARC_BPOK] = "bpok", /* NP-NT, PT-T, PNT-NT */
62 [PERF_COUNT_HW_BRANCH_MISSES] = "bpfail", /* NP-T, PT-NT, PNT-T */
67 [PERF_COUNT_ARC_DCLM] = "dclm", /* D-cache Load Miss */
68 [PERF_COUNT_ARC_DCSM] = "dcsm", /* D-cache Store Miss */
69 [PERF_COUNT_ARC_ICM] = "icm", /* I-cache Miss */
70 [PERF_COUNT_ARC_EDTLB] = "edtlb", /* D-TLB Miss */
71 [PERF_COUNT_ARC_EITLB] = "eitlb", /* I-TLB Miss */
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/linux-6.14.4/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-[email protected]
88 F: drivers/scsi/3w-*
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