Searched +full:rk3399 +full:- +full:power +full:- +full:controller (Results 1 – 25 of 59) sorted by relevance
123
/linux-6.14.4/Documentation/devicetree/bindings/power/ |
D | rockchip,power-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip Power Domains 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <[email protected]> 14 Rockchip processors include support for multiple power domains 16 application scenarios to save power. 18 Power domains contained within power-controller node are [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/usb/ |
D | rockchip,rk3399-dwc3.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/usb/rockchip,rk3399-dwc3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip RK3399 SuperSpeed DWC3 USB SoC controller 10 - Heiko Stuebner <[email protected]> 14 const: rockchip,rk3399-dwc3 16 '#address-cells': 19 '#size-cells': 26 - description: [all …]
|
/linux-6.14.4/arch/arm64/boot/dts/rockchip/ |
D | rk3399-base.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3399-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3399-power.h> 12 #include <dt-bindings/thermal/thermal.h> 15 compatible = "rockchip,rk3399"; 17 interrupt-parent = <&gic>; [all …]
|
D | rk3576.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rockchip,rk3576-cru.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rockchip,rk3576-power.h> 12 #include <dt-bindings/reset/rockchip,rk3576-cru.h> 13 #include <dt-bindings/soc/rockchip,boot-mode.h> 18 interrupt-parent = <&gic>; [all …]
|
D | rk356x-base.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3568-cru.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3568-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/soc/rockchip/ |
D | grf.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <[email protected]> 15 - items: 16 - enum: 17 - rockchip,rk3288-sgrf 18 - rockchip,rk3566-pipe-grf 19 - rockchip,rk3568-pcie3-phy-grf 20 - rockchip,rk3568-pipe-grf [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/media/ |
D | rockchip-rga.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/media/rockchip-rga.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip 2D raster graphic acceleration controller (RGA) 15 - Jacob Chen <jacob-[email protected]> 16 - Ezequiel Garcia <[email protected]> 21 - const: rockchip,rk3288-rga 22 - const: rockchip,rk3399-rga 23 - items: [all …]
|
D | rockchip,vdec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <[email protected]> 12 description: |- 13 The Rockchip rk3399 has a stateless Video Decoder that can decodes H.264, 19 - const: rockchip,rk3399-vdec 20 - items: 21 - enum: 22 - rockchip,rk3228-vdec [all …]
|
D | rockchip-isp1.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 --- 4 $id: http://devicetree.org/schemas/media/rockchip-isp1.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Helen Koike <[email protected]> 19 - fsl,imx8mp-isp 20 - rockchip,px30-cif-isp 21 - rockchip,rk3399-cif-isp 30 interrupt-names: 32 - const: isp [all …]
|
D | rockchip-vpu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/rockchip-vpu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Ezequiel Garcia <[email protected]> 18 - enum: 19 - rockchip,rk3036-vpu 20 - rockchip,rk3066-vpu 21 - rockchip,rk3288-vpu 22 - rockchip,rk3328-vpu [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/memory-controllers/ |
D | rockchip,rk3399-dmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip rk3399 DMC (Dynamic Memory Controller) device 10 - Brian Norris <[email protected]> 15 - rockchip,rk3399-dmc 17 devfreq-events: 26 clock-names: 28 - const: dmc_clk [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/display/rockchip/ |
D | cdn-dp-rockchip.txt | 1 Rockchip RK3399 specific extensions to the cdn Display Port 5 - compatible: must be "rockchip,rk3399-cdn-dp" 7 - reg: physical base address of the controller and length 9 - clocks: from common clock binding: handle to dp clock. 11 - clock-names: from common clock binding: 12 Required elements: "core-clk" "pclk" "spdif" "grf" 14 - resets : a list of phandle + reset specifier pairs 15 - reset-names : string of reset names 17 - power-domains : power-domain property defined with a phandle 18 to respective power domain. [all …]
|
D | rockchip-vop.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip SoC display controller (VOP) 10 VOP (Video Output Processor) is the display controller for the Rockchip 15 - Sandy Huang <hjc@rock-chips.com> 16 - Heiko Stuebner <[email protected]> 21 - rockchip,px30-vop-big 22 - rockchip,px30-vop-lit [all …]
|
D | rockchip,dw-mipi-dsi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-mipi-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sandy Huang <hjc@rock-chips.com> 11 - Heiko Stuebner <[email protected]> 16 - enum: 17 - rockchip,px30-mipi-dsi 18 - rockchip,rk3128-mipi-dsi 19 - rockchip,rk3288-mipi-dsi [all …]
|
D | rockchip,dw-hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Mark Yao <[email protected]> 13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP 17 - $ref: ../bridge/synopsys,dw-hdmi.yaml# 18 - $ref: /schemas/sound/dai-common.yaml# 23 - rockchip,rk3228-dw-hdmi 24 - rockchip,rk3288-dw-hdmi [all …]
|
D | rockchip,analogix-dp.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,analogix-dp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sandy Huang <hjc@rock-chips.com> 11 - Heiko Stuebner <[email protected]> 16 - rockchip,rk3288-dp 17 - rockchip,rk3399-edp 23 clock-names: 26 - const: dp [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/phy/ |
D | rockchip,inno-usb2phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/phy/rockchip,inno-usb2phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <[email protected]> 15 - rockchip,px30-usb2phy 16 - rockchip,rk3128-usb2phy 17 - rockchip,rk3228-usb2phy 18 - rockchip,rk3308-usb2phy 19 - rockchip,rk3328-usb2phy [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/arm/rockchip/ |
D | pmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip Power Management Unit (PMU) 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <[email protected]> 14 The PMU is used to turn on and off different power domains of the SoCs. 15 This includes the power to the CPU cores. 22 - rockchip,px30-pmu 23 - rockchip,rk3066-pmu [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/mmc/ |
D | arasan,sdhci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Arasan SDHCI Controller 10 - Adrian Hunter <[email protected]> 13 - $ref: mmc-controller.yaml# 14 - if: 18 const: arasan,sdhci-5.1 21 - phys 22 - phy-names [all …]
|
/linux-6.14.4/arch/arm/boot/dts/rockchip/ |
D | rv1126.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rockchip,rv1126-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rockchip,rv1126-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/iommu/ |
D | rockchip,iommu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <[email protected]> 15 shares its clocks, power domain and irq. 17 For information on assigning IOMMU controller to its peripheral devices, 23 - enum: 24 - rockchip,iommu 25 - rockchip,rk3568-iommu 26 - items: [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/gpu/ |
D | arm,mali-midgard.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/gpu/arm,mali-midgard.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rob Herring <[email protected]> 14 pattern: '^gpu@[a-f0-9]+$' 17 - items: 18 - enum: 19 - samsung,exynos5250-mali 20 - const: arm,mali-t604 [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/spi/ |
D | spi-rockchip.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-rockchip.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip SPI Controller 10 The Rockchip SPI controller is used to interface with various devices such 14 - $ref: spi-controller.yaml# 17 - Heiko Stuebner <[email protected]> 23 - const: rockchip,rk3036-spi 24 - const: rockchip,rk3066-spi [all …]
|
/linux-6.14.4/Documentation/devicetree/bindings/sound/ |
D | rockchip-spdif.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/sound/rockchip-spdif.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 15 - Heiko Stuebner <[email protected]> 20 - const: rockchip,rk3066-spdif 21 - const: rockchip,rk3228-spdif 22 - const: rockchip,rk3328-spdif 23 - const: rockchip,rk3366-spdif 24 - const: rockchip,rk3368-spdif [all …]
|
/linux-6.14.4/drivers/devfreq/ |
D | rk3399_dmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Author: Lin Huang <hl@rock-chips.com> 7 #include <linux/arm-smccc.h> 12 #include <linux/devfreq-event.h> 75 unsigned long old_clk_rate = dmcfreq->rate; in rk3399_dmcfreq_target() 93 if (dmcfreq->rate == target_rate) in rk3399_dmcfreq_target() 96 mutex_lock(&dmcfreq->lock); in rk3399_dmcfreq_target() 99 * Ensure power-domain transitions don't interfere with ARM Trusted in rk3399_dmcfreq_target() 100 * Firmware power-domain idling. in rk3399_dmcfreq_target() 109 * Some idle parameters may be based on the DDR controller clock, which in rk3399_dmcfreq_target() [all …]
|
123