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/linux-6.14.4/arch/arm64/boot/dts/renesas/
Drzg2ul-smarc.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/G2UL Type-1 SMARC EVK parts
8 #include <dt-bindings/gpio/gpio.h>
9 #include "rzg2ul-smarc-pinfunction.dtsi"
10 #include "rz-smarc-common.dtsi"
14 /delete-property/ pinctrl-0;
15 /delete-property/ pinctrl-names;
21 sound-dai = <&ssi1>;
25 clock-frequency = <400000>;
30 gpio-controller;
[all …]
Drzg2lc-smarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irqc-rzg2l.h>
10 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
27 reg_1p8v: regulator-1p8v {
28 compatible = "regulator-fixed";
29 regulator-name = "fixed-1.8V";
30 regulator-min-microvolt = <1800000>;
31 regulator-max-microvolt = <1800000>;
32 regulator-boot-on;
[all …]
Drzg2l-smarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irqc-rzg2l.h>
10 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
38 reg_1p8v: regulator-1p8v {
39 compatible = "regulator-fixed";
40 regulator-name = "fixed-1.8V";
41 regulator-min-microvolt = <1800000>;
42 regulator-max-microvolt = <1800000>;
43 regulator-boot-on;
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/leds/
Dleds-lp55xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-lp55xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <[email protected]>
11 - Pavel Machek <[email protected]>
27 - national,lp5521
28 - national,lp5523
29 - ti,lp55231
30 - ti,lp5562
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/pinctrl/
Dbrcm,iproc-gpio.txt5 - compatible:
6 "brcm,iproc-gpio" for the generic iProc based GPIO controller IP that
7 supports full-featured pinctrl and GPIO functions used in various iProc
10 May contain an SoC-specific compatibility string to accommodate any
11 SoC-specific features
13 "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or
14 "brcm,cygnus-crmu-gpio" for Cygnus SoCs
16 "brcm,iproc-nsp-gpio" for the iProc NSP SoC that has drive strength support
19 "brcm,iproc-stingray-gpio" for the iProc Stingray SoC that has the general
23 - reg:
[all …]
/linux-6.14.4/drivers/mmc/host/
Dsdhci_am654.c1 // SPDX-License-Identifier: GPL-2.0
3 * sdhci_am654.c - SDHCI driver for TI's AM654 SOCs
5 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com
18 #include "sdhci-cqhci.h"
19 #include "sdhci-pltfm.h"
88 #define SDHCI_AM654_AUTOSUSPEND_DELAY -1
108 [MMC_TIMING_LEGACY] = {"ti,otap-del-sel-legacy",
109 "ti,itap-del-sel-legacy",
111 [MMC_TIMING_MMC_HS] = {"ti,otap-del-sel-mmc-hs",
112 "ti,itap-del-sel-mmc-hs",
[all …]
Dsdhci-uhs2.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/drivers/mmc/host/sdhci_uhs2.c - Secure Digital Host Controller
22 #include "sdhci-uhs2.h"
28 pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
39 if (!(mmc_card_uhs2(host->mmc))) in sdhci_uhs2_dump_regs()
49 SDHCI_UHS2_DUMP("Int Stat: 0x%08x | Dev Sel : 0x%08x\n", in sdhci_uhs2_dump_regs()
73 return be16_to_cpu((__force __be16)cmd->uhs2_cmd->arg) & UHS2_ARG_IOADR_MASK; in uhs2_dev_cmd()
84 * sdhci_uhs2_reset - invoke SW reset
97 host->clock = 0; in sdhci_uhs2_reset()
103 mmc_hostname(host->mmc), (int)mask, mmc_hostname(host->mmc)); in sdhci_uhs2_reset()
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/mfd/
Ddlg,da9063.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steve Twiss <[email protected]>
13 For device-tree bindings of other sub-modules refer to the binding documents
14 under the respective sub-system directories.
15 Using regulator-{uv,ov}-{warn,error,protection}-microvolt requires special
21 - https://www.dialog-semiconductor.com/products/da9063l
22 - https://www.dialog-semiconductor.com/products/da9063
23 - https://www.dialog-semiconductor.com/products/da9062
[all …]
/linux-6.14.4/arch/arm/boot/dts/rockchip/
Drk3288-veyron-fievel.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron.dtsi"
10 #include "rk3288-veyron-analog-audio.dtsi"
14 compatible = "google,veyron-fievel-rev8", "google,veyron-fievel-rev7",
15 "google,veyron-fievel-rev6", "google,veyron-fievel-rev5",
16 "google,veyron-fievel-rev4", "google,veyron-fievel-rev3",
17 "google,veyron-fievel-rev2", "google,veyron-fievel-rev1",
18 "google,veyron-fievel-rev0", "google,veyron-fievel",
21 vccsys: regulator-vccsys {
[all …]
/linux-6.14.4/drivers/media/i2c/
Dtvp7002_reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
6 * Author: Santiago Nunez-Corrales <[email protected]>
15 * ------------------
20 * SEL: Select
30 * PWR: Power
/linux-6.14.4/drivers/staging/rtl8723bs/include/
Dhal_data.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
16 /* <Roger_Notes> For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06. */
159 …/* Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. …
166 enum rt_multi_func MultiFunc; /* For multi-function consideration. */
180 u8 nCur40MhzPrimeSC;/* Control channel sub-carrier */
237 /* CCK = 0 OFDM = 1 HT-MCS 0-7 = 2 */
245 u8 TxPwrLevelHT40_1S[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; /* For HT 40MHZ pwr */
246 u8 TxPwrLevelHT40_2S[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER]; /* For HT 40MHZ pwr */
247 s8 TxPwrHt20Diff[RF_PATH_MAX_92C_88E][CHANNEL_MAX_NUMBER];/* HT 20<->40 Pwr diff */
[all …]
/linux-6.14.4/sound/soc/codecs/
Dmax98088.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * max98088.c -- MAX98088 ALSA SoC Audio driver
337 "Off", "100Hz", "400Hz", "600Hz", "800Hz", "1000Hz", "200-400Hz",
338 "400-600Hz", "400-800Hz",
385 unsigned int sel = ucontrol->value.integer.value[0]; in max98088_mic1pre_set() local
387 max98088->mic1pre = sel; in max98088_mic1pre_set()
389 (1+sel)<<M98088_MICPRE_SHIFT); in max98088_mic1pre_set()
400 ucontrol->value.integer.value[0] = max98088->mic1pre; in max98088_mic1pre_get()
409 unsigned int sel = ucontrol->value.integer.value[0]; in max98088_mic2pre_set() local
411 max98088->mic2pre = sel; in max98088_mic2pre_set()
[all …]
/linux-6.14.4/arch/arm64/boot/dts/freescale/
Dimx93-9x9-qsb.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
13 compatible = "fsl,imx93-9x9-qsb", "fsl,imx93";
15 bt_sco_codec: bt-sco-codec {
16 #sound-dai-cells = <1>;
17 compatible = "linux,bt-sco";
21 stdout-path = &lpuart1;
24 reserved-memory {
25 #address-cells = <2>;
[all …]
/linux-6.14.4/arch/arm/boot/dts/nxp/imx/
Dmba6ulx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2018-2022 TQ-Systems GmbH
4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
8 model = "TQ-Systems MBA6ULx Baseboard";
18 stdout-path = &uart1;
22 compatible = "pwm-backlight";
23 power-supply = <&reg_mba6ul_3v3>;
24 enable-gpios = <&expander_out0 4 GPIO_ACTIVE_HIGH>;
29 compatible = "gpio-beeper";
33 gpio_buttons: gpio-keys {
[all …]
/linux-6.14.4/arch/arm/boot/dts/nvidia/
Dtegra124-apalis-v1.2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2016-2018 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
21 avddio-pex-supply = <&reg_1v05_vdd>;
22 avdd-pex-pll-supply = <&reg_1v05_vdd>;
23 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
24 dvddio-pex-supply = <&reg_1v05_vdd>;
25 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
26 hvdd-pex-supply = <&reg_module_3v3>;
27 vddio-pex-ctl-supply = <&reg_module_3v3>;
[all …]
Dtegra30-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
16 nvidia,hpd-gpio =
18 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
19 vdd-supply = <&reg_3v3_avdd_hdmi>;
24 lan-reset-n-hog {
25 gpio-hog;
27 output-high;
28 line-name = "LAN_RESET#";
33 pinctrl-names = "default";
[all …]
Dtegra124-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2016-2019 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
20 avddio-pex-supply = <&reg_1v05_vdd>;
21 avdd-pex-pll-supply = <&reg_1v05_vdd>;
22 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
23 dvddio-pex-supply = <&reg_1v05_vdd>;
24 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
25 hvdd-pex-supply = <&reg_module_3v3>;
26 vddio-pex-ctl-supply = <&reg_module_3v3>;
[all …]
Dtegra30-apalis-v1.1.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
16 avdd-pexa-supply = <&vdd2_reg>;
17 avdd-pexb-supply = <&vdd2_reg>;
18 avdd-pex-pll-supply = <&vdd2_reg>;
19 avdd-plle-supply = <&ldo6_reg>;
20 hvdd-pex-supply = <&reg_module_3v3>;
21 vddio-pex-ctl-supply = <&reg_module_3v3>;
22 vdd-pexa-supply = <&vdd2_reg>;
23 vdd-pexb-supply = <&vdd2_reg>;
27 nvidia,num-lanes = <4>;
[all …]
Dtegra30-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 avdd-pexa-supply = <&vdd2_reg>;
16 avdd-pexb-supply = <&vdd2_reg>;
17 avdd-pex-pll-supply = <&vdd2_reg>;
18 avdd-plle-supply = <&ldo6_reg>;
19 hvdd-pex-supply = <&reg_module_3v3>;
20 vddio-pex-ctl-supply = <&reg_module_3v3>;
21 vdd-pexa-supply = <&vdd2_reg>;
22 vdd-pexb-supply = <&vdd2_reg>;
26 nvidia,num-lanes = <4>;
[all …]
Dtegra124-jetson-tk1.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
7 #include "tegra124-jetson-tk1-emc.dtsi"
11 compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
17 /* This order keeps the mapping DB9 connector <-> ttyS0 */
24 stdout-path = "serial0:115200n8";
34 avddio-pex-supply = <&vdd_1v05_run>;
35 dvddio-pex-supply = <&vdd_1v05_run>;
36 avdd-pex-pll-supply = <&vdd_1v05_run>;
[all …]
/linux-6.14.4/arch/arm64/boot/dts/rockchip/
Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
9 #include "rk3399-op1.dtsi"
18 stdout-path = "serial2:115200n8";
27 * - Rails that only connect to the EC (or devices that the EC talks to)
29 * - Rails _are_ included if the rails go to the AP even if the AP
38 * - The EC controls the enable and the EC always enables a rail as
40 * - The rails are actually connected to each other by a jumper and
45 ppvar_sys: regulator-ppvar-sys {
[all …]
/linux-6.14.4/arch/arm/boot/dts/aspeed/
Daspeed-bmc-ampere-mtjade.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "ampere,mtjade-bmc", "aspeed,ast2500";
12 * i2c bus 50-57 assigned to NVMe slot 0-7
24 * i2c bus 60-67 assigned to NVMe slot 8-15
36 * i2c bus 70-77 assigned to NVMe slot 16-23
48 * i2c bus 80-81 assigned to NVMe M2 slot 0-1
60 stdout-path = &uart5;
[all …]
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dsc8180x-lenovo-flex-5g.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2020-2023, Linaro Limited
7 /dts-v1/;
9 #include <dt-bindings/firmware/qcom,scm.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/gpio-keys.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
15 #include "sc8180x-pmics.dtsi"
[all …]
Dsc8280xp-microsoft-blackrock.dts1 // SPDX-License-Identifier: BSD-3-Clause
9 /dts-v1/;
11 #include <dt-bindings/iio/qcom,spmi-adc7-pm8350.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/gpio-keys.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
18 #include "sc8280xp-pmics.dtsi"
23 chassis-type = "desktop";
31 wcd938x: audio-codec {
[all …]
Dsc8180x-primus.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2020-2023, Linaro Limited
7 /dts-v1/;
9 #include <dt-bindings/firmware/qcom,scm.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/gpio-keys.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
15 #include "sc8180x-pmics.dtsi"
[all …]

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