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/linux-6.14.4/drivers/clk/qcom/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
23 tristate "X1E80100 Camera Clock Controller"
27 Support for the camera clock controller on X1E80100 devices.
31 tristate "X1E80100 Display Clock Controller"
41 tristate "X1E80100 Global Clock Controller"
45 Support for the global clock controller on Qualcomm Technologies, Inc
47 Say Y if you want to use peripheral devices such as UART, SPI, I2C,
51 tristate "X1E80100 Graphics Clock Controller"
55 Support for the graphics clock controller on X1E80100 devices.
56 Say Y if you want to support graphics controller devices and
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/linux-6.14.4/drivers/usb/gadget/udc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 # (a) a peripheral controller, and
7 # NOTE: Gadget support ** DOES NOT ** depend on host-side CONFIG_USB !!
9 # - Host systems (like PCs) need CONFIG_USB (with "A" jacks).
10 # - Peripherals (like PDAs) need CONFIG_USB_GADGET (with "B" jacks).
11 # - Some systems have both kinds of controllers.
13 # With help from a special transceiver and a "Mini-AB" jack, systems with
14 # both kinds of controller can also support "USB On-the-Go" (CONFIG_USB_OTG).
18 # USB Peripheral Controller Support
22 # - integrated/SOC controllers first
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/linux-6.14.4/Documentation/devicetree/bindings/clock/
Dpistachio-clock.txt4 Pistachio has four clock controllers (core clock, peripheral clock, peripheral
6 from the device-tree.
9 ----------------
12 defined with the following clock-output-names:
13 - "xtal": External 52Mhz oscillator (required)
14 - "audio_clk_in": Alternate audio reference clock (optional)
15 - "enet_clk_in": Alternate ethernet PHY clock (optional)
17 Core clock controller:
18 ----------------------
20 The core clock controller generates clocks for the CPU, RPU (WiFi + BT
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Dstericsson,u8500-clks.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/stericsson,u8500-clks.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsson DB8500 (U8500) clocks
10 - Ulf Hansson <[email protected]>
11 - Linus Walleij <[email protected]>
14 DB8500 digital baseband system-on-chip and its siblings such as
16 itself, not off-chip clocks. There are four different on-chip
17 clocks - RTC (32 kHz), CPU clock (SMP TWD), PRCMU (power reset and
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/linux-6.14.4/Documentation/devicetree/bindings/interrupt-controller/
Dimg,pdc-intc.txt1 * ImgTec Powerdown Controller (PDC) Interrupt Controller Binding
4 representation of a PDC IRQ controller. This has a number of input interrupt
10 - compatible: Specifies the compatibility list for the interrupt controller.
11 The type shall be <string> and the value shall include "img,pdc-intc".
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
14 addressable register space. The type shall be <prop-encoded-array>.
16 - interrupt-controller: The presence of this property identifies the node
17 as an interrupt controller. No property value shall be defined.
19 - #interrupt-cells: Specifies the number of cells needed to encode an
22 - num-perips: Number of waking peripherals.
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/linux-6.14.4/Documentation/devicetree/bindings/spi/
Dspi-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
10 Many SPI controllers need to add properties to peripheral devices. They could
11 be common properties like spi-max-frequency, spi-cpha, etc. or they could be
12 controller specific like delay in clock or data lines, etc. These properties
13 need to be defined in the peripheral node because they are per-peripheral and
14 there can be multiple peripherals attached to a controller. All those
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/linux-6.14.4/Documentation/devicetree/bindings/memory-controllers/
Dmc-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/mc-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a Memory Controller bus.
10 Many Memory Controllers need to add properties to peripheral devices.
11 They could be common properties like reg or they could be controller
13 to be defined in the peripheral node because they are per-peripheral
14 and there can be multiple peripherals attached to a controller. All
15 those properties are listed here. The controller specific properties
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/linux-6.14.4/Documentation/devicetree/bindings/pinctrl/
Datmel,at91rm9200-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/atmel,at91rm9200-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip PIO3 Pinmux Controller
10 - Manikandan Muralidharan <[email protected]>
13 The AT91 Pinmux Controller, enables the IC to share one PAD to several
17 etc) the controller controls also the PAD settings parameters.
22 - items:
23 - enum:
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/linux-6.14.4/Documentation/devicetree/bindings/dma/
Datmel,sama5d4-dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/atmel,sama5d4-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip AT91 Extensible Direct Memory Access Controller
10 - Nicolas Ferre <[email protected]>
11 - Charan Pedumuru <[email protected]>
14 The DMA Controller (XDMAC) is a AHB-protocol central direct memory access
15 controller. It performs peripheral data transfer and memory move operations
17 channel. Each channel is fully programmable and provides both peripheral
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/linux-6.14.4/include/soc/canaan/
Dk210-sysctl.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2019-20 Sean Anderson <[email protected]>
10 * Kendryte K210 SoC system controller registers offsets.
11 * Taken from Kendryte SDK (kendryte-standalone-sdk).
15 #define K210_SYSCTL_PLL0 0x08 /* PLL0 controller */
16 #define K210_SYSCTL_PLL1 0x0C /* PLL1 controller */
17 #define K210_SYSCTL_PLL2 0x10 /* PLL2 controller */
20 #define K210_SYSCTL_SEL0 0x20 /* Clock select controller 0 */
21 #define K210_SYSCTL_SEL1 0x24 /* Clock select controller 1 */
23 #define K210_SYSCTL_EN_PERI 0x2C /* Peripheral clock enable */
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/linux-6.14.4/Documentation/driver-api/memory-devices/
Dti-gpmc.rst1 .. SPDX-License-Identifier: GPL-2.0
4 GPMC (General Purpose Memory Controller)
7 GPMC is an unified memory controller dedicated to interfacing external
14 * Pseudo-SRAM devices
24 functioning of the peripheral, while peripheral has another set of
25 timings. To have peripheral work with gpmc, peripheral timings has to
27 translated depends on the connected peripheral. Also there is a
32 from gpmc peripheral timings. struct gpmc_device_timings fields has to
33 be updated with timings from the datasheet of the peripheral that is
34 connected to gpmc. A few of the peripheral timings can be fed either
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/linux-6.14.4/drivers/dma/qcom/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
9 controller, as present on MSM8x60, APQ8064, and IPQ8064 devices.
10 This controller provides DMA capabilities for both general purpose
11 and on-chip peripheral devices.
19 Enable support for the QCOM BAM DMA controller. This controller
20 provides DMA capabilities for a variety of on-chip devices.
28 Enable support for the QCOM GPI DMA controller. This controller
29 provides DMA capabilities for a variety of peripheral buses such
32 transfer data between DDR and peripheral.
51 Enable support for the Qualcomm Technologies HIDMA controller.
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/linux-6.14.4/Documentation/devicetree/bindings/phy/
Dnvidia,tegra194-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra194 XUSB pad controller
10 - Thierry Reding <[email protected]>
11 - Jon Hunter <[email protected]>
14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
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Dnvidia,tegra186-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 XUSB pad controller
10 - Thierry Reding <[email protected]>
11 - Jon Hunter <[email protected]>
14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
[all …]
Dnvidia,tegra210-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra210 XUSB pad controller
10 - Thierry Reding <[email protected]>
11 - Jon Hunter <[email protected]>
14 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
[all …]
/linux-6.14.4/arch/powerpc/platforms/52xx/
Dmpc52xx_pic.c3 * Programmable Interrupt Controller functions for the Freescale MPC52xx.
20 * This is the device driver for the MPC5200 interrupt controller.
23 * -----------------
24 * The MPC5200 interrupt controller groups the all interrupt sources into
25 * three groups called 'critical', 'main', and 'peripheral'. The critical
28 * gpios, and the general purpose timers. Peripheral group contains the
29 * remaining irq sources from all of the on-chip peripherals (PSCs, Ethernet,
33 * -----
37 * infrastructure lets each interrupt controller to define a local set
41 * To define a range of virq numbers for this controller, this driver first
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/linux-6.14.4/Documentation/devicetree/bindings/soc/socionext/
Dsocionext,uniphier-perictrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-perictrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier peripheral block controller
10 - Kunihiko Hayashi <[email protected]>
13 Peripheral block implemented on Socionext UniPhier SoCs is an integrated
15 Peripheral block controller is a logic to control the component.
20 - enum:
21 - socionext,uniphier-ld4-perictrl
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/linux-6.14.4/drivers/usb/cdns3/
DKconfig8 dual-role controller.
9 It supports: dual-role switch, Host-only, and Peripheral-only.
17 tristate "Cadence USB3 Dual-Role Controller"
20 Say Y here if your system has a Cadence USB3 dual-role controller.
21 It supports: dual-role switch, Host-only, and Peripheral-only.
30 bool "Cadence USB3 device controller"
33 Say Y here to enable device controller functionality of the
34 Cadence USBSS-DEV driver.
36 This controller supports FF, HS and SS mode. It doesn't support
40 bool "Cadence USB3 host controller"
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/linux-6.14.4/Documentation/devicetree/bindings/net/can/
Dst,stm32-bxcan.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics bxCAN controller
9 description: STMicroelectronics BxCAN controller for CAN bus
12 - Dario Binacchi <[email protected]>
15 - $ref: can-controller.yaml#
20 - st,stm32f4-bxcan
22 st,can-primary:
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/linux-6.14.4/arch/mips/include/asm/txx9/
Ddmac.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * TXx9 SoC DMA Controller
14 * struct txx9dmac_platform_data - Controller configuration parameters
24 * struct txx9dmac_chan_platform_data - Channel configuration parameters
32 * struct txx9dmac_slave - Controller-specific information about a slave
34 * memory-to-peripheral transfers
36 * peripheral-to-memory transfers
37 * @reg_width: peripheral register width
/linux-6.14.4/drivers/usb/gadget/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 # (a) a peripheral controller, and
7 # NOTE: Gadget support ** DOES NOT ** depend on host-side CONFIG_USB !!
9 # - Host systems (like PCs) need CONFIG_USB (with "A" jacks).
10 # - Peripherals (like PDAs) need CONFIG_USB_GADGET (with "B" jacks).
11 # - Some systems have both kinds of controllers.
13 # With help from a special transceiver and a "Mini-AB" jack, systems with
14 # both kinds of controller can also support "USB On-the-Go" (CONFIG_USB_OTG).
23 PC) controlling up to 127 peripheral devices.
25 you can't connect a "to-the-host" connector to a peripheral.
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/arm/hisilicon/controller/
Dhi3798cv200-perictrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/hisilicon/controller/hi3798cv200-perictrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Hisilicon Hi3798CV200 Peripheral Controller
10 - Wei Xu <[email protected]>
13 The Hi3798CV200 Peripheral Controller controls peripherals, queries
19 - const: hisilicon,hi3798cv200-perictrl
20 - const: syscon
21 - const: simple-mfd
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/linux-6.14.4/Documentation/driver-api/usb/
Dgadget.rst11 This document presents a Linux-USB "Gadget" kernel mode API, for use
17 - Supports USB 2.0, for high speed devices which can stream data at
20 - Handles devices with dozens of endpoints just as well as ones with
21 just two fixed-function ones. Gadget drivers can be written so
24 - Flexible enough to expose more complex USB device capabilities such
28 - USB "On-The-Go" (OTG) support, in conjunction with updates to the
29 Linux-USB host side.
31 - Sharing data structures and API models with the Linux-USB host side
32 API. This helps the OTG support, and looks forward to more-symmetric
36 - Minimalist, so it's easier to support new device controller hardware.
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/linux-6.14.4/Documentation/devicetree/bindings/bus/
Dst,stm32mp25-rifsc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/st,stm32mp25-rifsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STM32 Resource isolation framework security controller
10 - Gatien Chevallier <[email protected]>
17 The RIFSC (RIF security controller) is composed of three sets of registers,
19 - RISC registers associated with RISUP logic (resource isolation device unit
20 for peripherals), assign all non-RIF aware peripherals to zero, one or
22 - RIMC registers: associated with RIMU logic (resource isolation master
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/linux-6.14.4/include/linux/usb/
Dotg.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * (for either host or peripheral roles) don't use these calls; they
27 /* bind/unbind the host controller */
30 /* bind/unbind the peripheral controller */
34 /* effective for A-peripheral, ignored for B devices */
37 /* for B devices only: start session with A-Host */
46 * struct usb_otg_caps - describes the otg capabilities of the device
48 * in binary-coded decimal (i.e. 2.0 is 0200H).
66 if (otg && otg->start_hnp) in otg_start_hnp()
67 return otg->start_hnp(otg); in otg_start_hnp()
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