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/linux-6.14.4/drivers/comedi/
Dcomedi_pci.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Comedi PCI driver specific functions.
6 * COMEDI - Linux Control and Measurement Device Interface
7 * Copyright (C) 1997-2000 David A. Schleef <[email protected]>
15 * comedi_to_pci_dev() - Return PCI device attached to COMEDI device
18 * Assuming @dev->hw_dev is non-%NULL, it is assumed to be pointing to a
21 * Return: Attached PCI device if @dev->hw_dev is non-%NULL.
22 * Return %NULL if @dev->hw_dev is %NULL.
26 return dev->hw_dev ? to_pci_dev(dev->hw_dev) : NULL; in comedi_to_pci_dev()
31 * comedi_pci_enable() - Enable the PCI device and request the regions
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/linux-6.14.4/Documentation/PCI/
Dacpi-info.rst1 .. SPDX-License-Identifier: GPL-2.0
4 ACPI considerations for PCI host bridges
10 For example, there's no standard hardware mechanism for enumerating PCI
12 method for accessing PCI config space below it, the address space windows
13 the host bridge forwards to PCI (using _CRS), and the routing of legacy
16 PCI devices, which are below the host bridge, generally do not need to be
17 described via ACPI. The OS can discover them via the standard PCI
19 devices and read and size their BARs. However, ACPI may describe PCI
25 namespace [2]. The _CRS is like a generalized PCI BAR: the OS can read
39 If the OS is expected to manage a non-discoverable device described via
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Dpcieaer-howto.rst1 .. SPDX-License-Identifier: GPL-2.0
5 The PCI Express Advanced Error Reporting Driver Guide HOWTO
8 :Authors: - T. Long Nguyen <[email protected]>
9 - Yanmin Zhang <[email protected]>
17 ----------------
19 This guide describes the basics of the PCI Express (PCIe) Advanced Error
26 ----------------------------
41 - Gathers the comprehensive error information if errors occurred.
42 - Reports error to the users.
43 - Performs error recovery actions.
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Dsysfs-pci.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Accessing PCI device resources through sysfs
7 sysfs, usually mounted at /sys, provides access to PCI resources on platforms
11 |-- 0000:17:00.0
12 | |-- class
13 | |-- config
14 | |-- device
15 | |-- enable
16 | |-- irq
17 | |-- local_cpus
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/linux-6.14.4/drivers/pci/endpoint/functions/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 # PCI Endpoint Functions
7 tristate "PCI Endpoint Test driver"
12 for PCI Endpoint.
17 tristate "PCI Endpoint NTB driver"
21 Select this configuration option to enable the Non-Transparent
22 Bridge (NTB) driver for PCI Endpoint. NTB driver implements NTB
30 tristate "PCI Endpoint Virtual NTB driver"
35 Select this configuration option to enable the Non-Transparent
37 between PCI Root Port and PCIe Endpoint.
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/linux-6.14.4/drivers/mcb/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 FPGA based devices. It is used to identify MCB based IP-Cores within
21 tristate "PCI based MCB carrier"
23 depends on PCI
26 This is a MCB carrier on a PCI device. Both PCI attached on-board
30 If build as a module, the module is called mcb-pci.ko
33 tristate "LPC (non PCI) based MCB carrier"
37 This is a MCB carrier on a LPC or non PCI device.
39 If build as a module, the module is called mcb-lpc.ko
/linux-6.14.4/drivers/edac/
Di7300_edac.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * Intel 7300 Chipset Memory Controller Hub (MCH) - Datasheet
13 * TODO: The chipset allow checking for PCI Express errors also. Currently,
21 #include <linux/pci.h>
48 * Branch 0 - 2 channels: channels 0 and 1 (FDB0 PCI dev 21.0)
49 * Branch 1 - 2 channels: channels 2 and 3 (FDB1 PCI dev 22.0)
151 * memory. From datasheet item 7.3.1 (FB-DIMM technology & organization), it
170 * MTRx - Memory Technology Registers
192 [22] = "Non-Redundant Fast Reset Timeout",
195 [0] = "Memory Write error on non-redundant retry or "
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/linux-6.14.4/Documentation/devicetree/bindings/pci/
Dv3-v360epc-pci.txt1 V3 Semiconductor V360 EPC PCI bridge
6 - compatible: should be one of:
7 "v3,v360epc-pci"
8 "arm,integrator-ap-pci", "v3,v360epc-pci"
9 - reg: should contain two register areas:
12 - interrupts: should contain a reference to the V3 error interrupt
14 - bus-range: see pci.txt
15 - ranges: this follows the standard PCI bindings in the IEEE Std
16 1275-1994 (see pci.txt) with the following restriction:
17 - The non-prefetchable and prefetchable memory windows must
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Dfaraday,ftpci100.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/faraday,ftpci100.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Faraday Technology FTPCI100 PCI Host Bridge
10 - Linus Walleij <[email protected]>
13 This PCI bridge is found inside that Cortina Systems Gemini SoC platform and
15 plain and dual PCI. The plain version embeds a cascading interrupt controller
18 The host controller appear on the PCI bus with vendor ID 0x159b (Faraday
21 The plain variant has 128MiB of non-prefetchable memory space, whereas the
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Dnvidia,tegra20-pcie.txt4 - compatible: Must be:
5 - "nvidia,tegra20-pcie": for Tegra20
6 - "nvidia,tegra30-pcie": for Tegra30
7 - "nvidia,tegra124-pcie": for Tegra124 and Tegra132
8 - "nvidia,tegra210-pcie": for Tegra210
9 - "nvidia,tegra186-pcie": for Tegra186
10 - power-domains: To ungate power partition by BPMP powergate driver. Must
13 - device_type: Must be "pci"
14 - reg: A list of physical base address and length for each set of controller
15 registers. Must contain an entry for each entry in the reg-names property.
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Dhost-generic-pci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/host-generic-pci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic PCI host controller
10 - Will Deacon <[email protected]>
13 Firmware-initialised PCI host controllers and PCI emulations, such as the
14 virtio-pci implementations found in kvmtool and other para-virtualised
21 Configuration Space is assumed to be memory-mapped (as opposed to being
23 geography of a PCI bus address by concatenating the various components to
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/linux-6.14.4/arch/alpha/kernel/
Dsys_rawhide.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/pci.h>
61 unsigned int irq = d->irq; in rawhide_enable_irq()
63 irq -= 16; in rawhide_enable_irq()
65 if (!hose_exists(hose)) /* if hose non-existent, exit */ in rawhide_enable_irq()
68 irq -= hose * 24; in rawhide_enable_irq()
82 unsigned int irq = d->irq; in rawhide_disable_irq()
84 irq -= 16; in rawhide_disable_irq()
86 if (!hose_exists(hose)) /* if hose non-existent, exit */ in rawhide_disable_irq()
89 irq -= hose * 24; in rawhide_disable_irq()
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/linux-6.14.4/Documentation/networking/device_drivers/ethernet/amd/
Dpds_vfio_pci.rst1 .. SPDX-License-Identifier: GPL-2.0+
2 .. note: can be edited and viewed with /usr/bin/formiko-vim
5 PCI VFIO driver for the AMD/Pensando(R) DSC adapter family
8 AMD/Pensando Linux VFIO PCI Device Driver
14 The ``pds-vfio-pci`` module is a PCI driver that supports Live Migration
20 The pds-vfio-pci device is enabled via multiple configuration steps and
21 depends on the ``pds_core`` driver to create and enable SR-IOV Virtual
26 example assumes the pds_core and pds-vfio-pci modules are already
29 .. code-block:: bash
30 :name: example-setup-script
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/linux-6.14.4/Documentation/devicetree/bindings/iommu/
Driscv,iommu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V IOMMU Architecture Implementation
10 - Tomasz Jeznach <[email protected]>
13 The RISC-V IOMMU provides memory address translation and isolation for
14 input and output devices, supporting per-device translation context,
17 It supports identical translation table format to the RISC-V address
19 Hardware uses in-memory command and fault reporting queues with wired
22 Visit https://github.com/riscv-non-isa/riscv-iommu for more details.
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/linux-6.14.4/drivers/pci/
Dpci-bridge-emul.c1 // SPDX-License-Identifier: GPL-2.0
7 * This file helps PCI controller drivers implement a fake root port
8 * PCI bridge when the HW doesn't provide such a root port PCI
11 * It emulates a PCI bridge by providing a fake PCI configuration
14 * this fake configuration space in memory. However, PCI controller
20 #include <linux/pci.h>
21 #include "pci-bridge-emul.h"
28 * struct pci_bridge_reg_behavior - register bits behaviors
29 * @ro: Read-Only bits
30 * @rw: Read-Write bits
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/linux-6.14.4/Documentation/arch/x86/i386/
DIO-APIC.rst1 .. SPDX-License-Identifier: GPL-2.0
4 IO-APIC
9 Most (all) Intel-MP compliant SMP boards have the so-called 'IO-APIC',
12 IO-APIC, interrupts from hardware will be delivered only to the
16 multiple IO-APICs. Multiple IO-APICs are used in high-end servers to
20 usually worked around by the kernel. If your MP-compliant SMP board does
21 not boot Linux, then consult the linux-smp mailing list archives first.
23 If your box boots fine with enabled IO-APIC IRQs, then your
28 0: 1360293 IO-APIC-edge timer
29 1: 4 IO-APIC-edge keyboard
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/linux-6.14.4/include/linux/
Dvirtio_pci_modern.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <linux/pci.h>
9 * struct virtio_pci_modern_device - info for modern PCI virtio
10 * @pci_dev: Ptr to the PCI device struct
11 * @common: Position of the common capability in the PCI config
12 * @device: Device-specific data (non-legacy mode)
13 * @notify_base: Base of vq notifications (non-legacy mode)
16 * @notify_len: So we can sanity-check accesses
17 * @device_len: So we can sanity-check accesses
18 * @notify_map_cap: Capability for when we need to map notifications per-vq
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/linux-6.14.4/drivers/ntb/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Non-Transparent Bridge support"
4 depends on PCI
6 The PCI-E Non-transparent bridge hardware is a point-to-point PCI-E bus
7 connecting 2 systems. When configured, writes to the device's PCI
9 ntb Linux driver uses this point-to-point communication as a method to
/linux-6.14.4/Documentation/driver-api/
Ddevice-io.rst10 Bus-Independent Device Accesses
27 ----------------------------
33 devices. The PCI bus walk is a good example of such a scheme. This
49 --------------------
52 memory-mapped registers on the device. Linux provides interfaces to read
53 and write 8-bit, 16-bit, 32-bit and 64-bit quantities. Due to a
76 are burned by the fact that PCI bus writes are posted asynchronously. A
82 from config space, which is guaranteed to soft-fail if the card doesn't
94 reg = ha->iobase;
96 WRT_REG_WORD(&reg->ictrl, 0);
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/linux-6.14.4/arch/x86/pci/
Dintel_mid_pci.c1 // SPDX-License-Identifier: GPL-2.0
3 * Intel MID PCI support
7 * Moorestown has an interesting PCI implementation:
8 * - configuration space is memory mapped (as defined by MCFG)
9 * - Lincroft devices also have a real, type 1 configuration space
10 * - Early Lincroft silicon has a type 1 access bug that will cause
11 * a hang if non-existent devices are accessed
12 * - some devices have the "fixed BAR" capability, which means
23 #include <linux/pci.h>
36 #include <asm/intel-family.h>
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/linux-6.14.4/Documentation/PCI/endpoint/
Dpci-ntb-howto.rst1 .. SPDX-License-Identifier: GPL-2.0
4 PCI Non-Transparent Bridge (NTB) Endpoint Function (EPF) User Guide
9 This document is a guide to help users use pci-epf-ntb function driver
13 Documentation/PCI/endpoint/pci-ntb-function.rst
19 ---------------------------
27 2900000.pcie-ep 2910000.pcie-ep
32 2900000.pcie-ep 2910000.pcie-ep
36 -------------------------
40 # ls /sys/bus/pci-epf/drivers
49 Creating pci-epf-ntb Device
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Dpci-vntb-howto.rst1 .. SPDX-License-Identifier: GPL-2.0
4 PCI Non-Transparent Bridge (NTB) Endpoint Function (EPF) User Guide
9 This document is a guide to help users use pci-epf-vntb function driver
13 Documentation/PCI/endpoint/pci-vntb-function.rst
19 ---------------------------
32 -------------------------
36 # ls /sys/bus/pci-epf/drivers
45 Creating pci-epf-vntb Device
46 ----------------------------
48 PCI endpoint function device can be created using the configfs. To create
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/linux-6.14.4/drivers/pci/controller/
Dpci-v3-semi.c1 // SPDX-License-Identifier: GPL-2.0
3 * Support for V3 Semiconductor PCI Local Bus to PCI Bridge
6 * Based on the code from arch/arm/mach-integrator/pci_v3.c
8 * Copyright (C) 2000-2001 Deep Blue Solutions Ltd
25 #include <linux/pci.h>
34 #include "../pci.h"
89 /* PCI STATUS bits */
105 /* PCI COMMAND bits */
118 /* PCI CFG bits */
134 /* PCI BASE bits (PCI -> Local Bus) */
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/linux-6.14.4/Documentation/firmware-guide/acpi/apei/
Deinj.rst1 .. SPDX-License-Identifier: GPL-2.0
15 which shows that the BIOS is exposing an EINJ table - it is the
43 - available_error_type
51 0x00000002 Processor Uncorrectable non-fatal
54 0x00000010 Memory Uncorrectable non-fatal
56 0x00000040 PCI Express Correctable
57 0x00000080 PCI Express Uncorrectable non-fatal
58 0x00000100 PCI Express Uncorrectable fatal
60 0x00000400 Platform Uncorrectable non-fatal
67 - error_type
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/linux-6.14.4/Documentation/virt/hyperv/
Dvpci.rst1 .. SPDX-License-Identifier: GPL-2.0
3 PCI pass-thru devices
5 In a Hyper-V guest VM, PCI pass-thru devices (also called
6 virtual PCI devices, or vPCI devices) are physical PCI devices
16 Hyper-V terminology for vPCI devices is "Discrete Device
17 Assignment" (DDA). Public documentation for Hyper-V DDA is
20 …tps://learn.microsoft.com/en-us/windows-server/virtualization/hyper-v/plan/plan-for-deploying-devi…
23 and for GPUs. A similar mechanism for NICs is called SR-IOV
25 driver to interact directly with the hardware. See Hyper-V
26 public documentation here: `SR-IOV`_
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