Lines Matching +full:non +full:- +full:pci

1 .. SPDX-License-Identifier: GPL-2.0
4 ACPI considerations for PCI host bridges
10 For example, there's no standard hardware mechanism for enumerating PCI
12 method for accessing PCI config space below it, the address space windows
13 the host bridge forwards to PCI (using _CRS), and the routing of legacy
16 PCI devices, which are below the host bridge, generally do not need to be
17 described via ACPI. The OS can discover them via the standard PCI
19 devices and read and size their BARs. However, ACPI may describe PCI
25 namespace [2]. The _CRS is like a generalized PCI BAR: the OS can read
39 If the OS is expected to manage a non-discoverable device described via
44 PCI host bridges are PNP0A03 or PNP0A08 devices. Their _CRS should
46 they forward down to the PCI bus, as well as registers of the host bridge
47 itself that are not forwarded to PCI. The host bridge registers include
50 These are all device-specific, non-architected things, so the only way a
52 the device-specific details. The host bridge registers also include ECAM
66 bridge registers (including ECAM space) in PNP0C02 catch-all devices [6].
67 With the exception of ECAM, the bridge register space is device-specific
78 PNP0C02 "motherboard" devices are basically a catch-all. There's no
87 and converts memory accesses into PCI configuration accesses. The spec
89 the address space is device-specific. An ACPI OS learns the base address
92 The MCFG table must describe the ECAM space of non-hot pluggable host
95 hot-pluggable host bridge [9]. Note that for both MCFG and _CBA, the base
101 For any device that is on a non-enumerable type of bus (for example, an
110 Each device enumerated by ACPI includes ACPI-defined objects in the
131 provide resources (for example, a proprietary PCI bridge), or do both.
152 [6] PCI Firmware 3.2, sec 4.1.2:
159 the resources in this case should not be claimed in the root PCI bus’s
164 [7] PCI Express 4.0, sec 7.2.2:
165 For systems that are PC-compatible, or that do not implement a
166 processor-architecture-specific firmware interface standard that allows
170 [8] PCI Firmware 3.2, sec 4.1.2:
172 addresses corresponding to the non-hot removable PCI Segment Groups
173 range within a PCI Segment Group available to the operating system at
174 boot. This is required for the PC-compatible systems.
177 corresponding to the PCI Segment Groups available to the system at
180 [9] PCI Firmware 3.2, sec 4.1.3:
182 an optional ACPI object that returns the 64-bit memory mapped
184 base address returned by _CBA is processor-relative address. The _CBA
190 base address corresponding to the PCI Segment Group for the bus number