| /linux-6.14.4/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
| D | aldebaran_ppt.c | 369 dpm_table = &dpm_context->dpm_tables.gfx_table; in aldebaran_set_default_dpm_table()
541 struct smu_13_0_dpm_table *gfx_table = in aldebaran_populate_umd_state_clk() local
542 &dpm_context->dpm_tables.gfx_table; in aldebaran_populate_umd_state_clk()
550 pstate_table->gfxclk_pstate.min = gfx_table->min; in aldebaran_populate_umd_state_clk()
551 pstate_table->gfxclk_pstate.peak = gfx_table->max; in aldebaran_populate_umd_state_clk()
552 pstate_table->gfxclk_pstate.curr.min = gfx_table->min; in aldebaran_populate_umd_state_clk()
553 pstate_table->gfxclk_pstate.curr.max = gfx_table->max; in aldebaran_populate_umd_state_clk()
565 if (gfx_table->count > ALDEBARAN_UMD_PSTATE_GFXCLK_LEVEL && in aldebaran_populate_umd_state_clk()
569 gfx_table->dpm_levels[ALDEBARAN_UMD_PSTATE_GFXCLK_LEVEL].value; in aldebaran_populate_umd_state_clk()
810 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in aldebaran_emit_clk_levels()
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| D | smu_v13_0_6_ppt.c | 967 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_6_set_default_dpm_table()
1047 struct smu_13_0_dpm_table *gfx_table = in smu_v13_0_6_populate_umd_state_clk() local
1048 &dpm_context->dpm_tables.gfx_table; in smu_v13_0_6_populate_umd_state_clk()
1055 pstate_table->gfxclk_pstate.min = gfx_table->min; in smu_v13_0_6_populate_umd_state_clk()
1056 pstate_table->gfxclk_pstate.peak = gfx_table->max; in smu_v13_0_6_populate_umd_state_clk()
1057 pstate_table->gfxclk_pstate.curr.min = gfx_table->min; in smu_v13_0_6_populate_umd_state_clk()
1058 pstate_table->gfxclk_pstate.curr.max = gfx_table->max; in smu_v13_0_6_populate_umd_state_clk()
1070 if (gfx_table->count > SMU_13_0_6_UMD_PSTATE_GFXCLK_LEVEL && in smu_v13_0_6_populate_umd_state_clk()
1074 gfx_table->dpm_levels[SMU_13_0_6_UMD_PSTATE_GFXCLK_LEVEL].value; in smu_v13_0_6_populate_umd_state_clk()
1448 freq = dpm_context->dpm_tables.gfx_table.dpm_levels[level].value; in smu_v13_0_6_upload_dpm_level()
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| D | aldebaran_ppt.h | 61 struct aldebaran_single_dpm_table gfx_table; member
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| D | smu_v13_0_7_ppt.c | 603 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_7_set_default_dpm_table()
895 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_7_get_dpm_ultimate_freq()
1210 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_7_print_clk_levels()
2001 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_7_force_clk_levels()
2301 struct smu_13_0_dpm_table *gfx_table = in smu_v13_0_7_populate_umd_state_clk() local
2302 &dpm_context->dpm_tables.gfx_table; in smu_v13_0_7_populate_umd_state_clk()
2320 pstate_table->gfxclk_pstate.min = gfx_table->min; in smu_v13_0_7_populate_umd_state_clk()
2322 (driver_clocks.GameClockAc < gfx_table->max)) in smu_v13_0_7_populate_umd_state_clk()
2325 pstate_table->gfxclk_pstate.peak = gfx_table->max; in smu_v13_0_7_populate_umd_state_clk()
2343 driver_clocks.BaseClockAc < gfx_table->max) in smu_v13_0_7_populate_umd_state_clk()
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| D | smu_v13_0_0_ppt.c | 596 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_0_set_default_dpm_table()
906 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_0_get_dpm_ultimate_freq()
1221 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_0_print_clk_levels()
2012 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_0_force_clk_levels()
2315 struct smu_13_0_dpm_table *gfx_table = in smu_v13_0_0_populate_umd_state_clk() local
2316 &dpm_context->dpm_tables.gfx_table; in smu_v13_0_0_populate_umd_state_clk()
2334 pstate_table->gfxclk_pstate.min = gfx_table->min; in smu_v13_0_0_populate_umd_state_clk()
2336 (driver_clocks.GameClockAc < gfx_table->max)) in smu_v13_0_0_populate_umd_state_clk()
2339 pstate_table->gfxclk_pstate.peak = gfx_table->max; in smu_v13_0_0_populate_umd_state_clk()
2357 driver_clocks.BaseClockAc < gfx_table->max) in smu_v13_0_0_populate_umd_state_clk()
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| D | smu_v13_0.c | 1697 struct smu_13_0_dpm_table *gfx_table = in smu_v13_0_set_performance_level() local
1698 &dpm_context->dpm_tables.gfx_table; in smu_v13_0_set_performance_level()
1723 sclk_min = sclk_max = gfx_table->max; in smu_v13_0_set_performance_level()
1731 sclk_min = sclk_max = gfx_table->min; in smu_v13_0_set_performance_level()
1739 sclk_min = gfx_table->min; in smu_v13_0_set_performance_level()
1740 sclk_max = gfx_table->max; in smu_v13_0_set_performance_level()
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| /linux-6.14.4/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | vega20_hwmgr.c | 600 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_gfxclk_dpm_table()
666 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_default_dpm_tables()
1481 &(data->dpm_table.gfx_table); in vega20_get_sclk_od()
1483 &(data->golden_dpm_table.gfx_table); in vega20_get_sclk_od()
1500 &(data->golden_dpm_table.gfx_table); in vega20_set_sclk_od()
1571 struct vega20_single_dpm_table *gfx_table = &(data->dpm_table.gfx_table); in vega20_populate_umdpstate_clocks() local
1574 if (gfx_table->count > VEGA20_UMD_PSTATE_GFXCLK_LEVEL && in vega20_populate_umdpstate_clocks()
1576 hwmgr->pstate_sclk = gfx_table->dpm_levels[VEGA20_UMD_PSTATE_GFXCLK_LEVEL].value; in vega20_populate_umdpstate_clocks()
1579 hwmgr->pstate_sclk = gfx_table->dpm_levels[0].value; in vega20_populate_umdpstate_clocks()
1583 hwmgr->pstate_sclk_peak = gfx_table->dpm_levels[gfx_table->count - 1].value; in vega20_populate_umdpstate_clocks()
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| D | vega12_hwmgr.c | 667 dpm_table = &(data->dpm_table.gfx_table); in vega12_setup_default_dpm_tables()
788 struct vega12_single_dpm_table *dpm_table = &(data->dpm_table.gfx_table);
1041 struct vega12_single_dpm_table *gfx_dpm_table = &(data->dpm_table.gfx_table); in vega12_populate_umdpstate_clocks()
1166 min_freq = data->dpm_table.gfx_table.dpm_state.soft_min_level; in vega12_upload_dpm_min_level()
1257 max_freq = data->dpm_table.gfx_table.dpm_state.soft_max_level; in vega12_upload_dpm_max_level()
1661 soft_level = vega12_find_highest_dpm_level(&(data->dpm_table.gfx_table)); in vega12_force_dpm_highest()
1663 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_dpm_highest()
1664 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega12_force_dpm_highest()
1665 data->dpm_table.gfx_table.dpm_levels[soft_level].value; in vega12_force_dpm_highest()
1690 soft_level = vega12_find_lowest_dpm_level(&(data->dpm_table.gfx_table)); in vega12_force_dpm_lowest()
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| D | vega10_hwmgr.c | 1361 dpm_table = &(data->dpm_table.gfx_table); in vega10_setup_default_dpm_tables()
1733 struct vega10_single_dpm_table *dpm_table = &(data->dpm_table.gfx_table); in vega10_populate_all_graphic_levels()
3439 struct vega10_single_dpm_table *sclk_table = &(data->dpm_table.gfx_table); in vega10_find_dpm_states_clocks_in_dpm_table()
3495 for (count = 0; count < dpm_table->gfx_table.count; count++) in vega10_populate_and_upload_sclk_mclk_dpm_levels()
3496 dpm_table->gfx_table.dpm_levels[count].value = odn_clk_table->entries[count].clk; in vega10_populate_and_upload_sclk_mclk_dpm_levels()
3579 &(data->dpm_table.gfx_table), in vega10_trim_dpm_states()
3649 data->dpm_table.gfx_table.dpm_state.soft_min_level) { in vega10_upload_dpm_bootup_level()
3655 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega10_upload_dpm_bootup_level()
3707 data->dpm_table.gfx_table.dpm_state.soft_max_level) { in vega10_upload_dpm_max_level()
3712 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega10_upload_dpm_max_level()
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| D | vega12_hwmgr.h | 126 struct vega12_single_dpm_table gfx_table; member
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| D | vega10_hwmgr.h | 148 struct vega10_single_dpm_table gfx_table; member
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| D | vega20_hwmgr.h | 179 struct vega20_single_dpm_table gfx_table; member
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| /linux-6.14.4/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| D | arcturus_ppt.h | 61 struct arcturus_single_dpm_table gfx_table; member
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| D | arcturus_ppt.c | 387 dpm_table = &dpm_context->dpm_tables.gfx_table; in arcturus_set_default_dpm_table()
575 struct smu_11_0_dpm_table *gfx_table = in arcturus_populate_umd_state_clk() local
576 &dpm_context->dpm_tables.gfx_table; in arcturus_populate_umd_state_clk()
584 pstate_table->gfxclk_pstate.min = gfx_table->min; in arcturus_populate_umd_state_clk()
585 pstate_table->gfxclk_pstate.peak = gfx_table->max; in arcturus_populate_umd_state_clk()
593 if (gfx_table->count > ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL && in arcturus_populate_umd_state_clk()
597 gfx_table->dpm_levels[ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL].value; in arcturus_populate_umd_state_clk()
829 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in arcturus_emit_clk_levels()
959 freq = dpm_context->dpm_tables.gfx_table.dpm_levels[level].value; in arcturus_upload_dpm_level()
1022 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in arcturus_force_clk_levels()
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| D | smu_v11_0.c | 1853 struct smu_11_0_dpm_table *gfx_table = in smu_v11_0_set_performance_level() local
1854 &dpm_context->dpm_tables.gfx_table; in smu_v11_0_set_performance_level()
1870 sclk_min = sclk_max = gfx_table->max; in smu_v11_0_set_performance_level()
1875 sclk_min = sclk_max = gfx_table->min; in smu_v11_0_set_performance_level()
1880 sclk_min = gfx_table->min; in smu_v11_0_set_performance_level()
1881 sclk_max = gfx_table->max; in smu_v11_0_set_performance_level()
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| D | navi10_ppt.c | 992 dpm_table = &dpm_context->dpm_tables.gfx_table; in navi10_set_default_dpm_table()
1713 struct smu_11_0_dpm_table *gfx_table = in navi10_populate_umd_state_clk() local
1714 &dpm_context->dpm_tables.gfx_table; in navi10_populate_umd_state_clk()
1724 pstate_table->gfxclk_pstate.min = gfx_table->min; in navi10_populate_umd_state_clk()
1768 sclk_freq = gfx_table->dpm_levels[gfx_table->count - 1].value; in navi10_populate_umd_state_clk()
1779 if (gfx_table->max > NAVI10_UMD_PSTATE_PROFILING_GFXCLK && in navi10_populate_umd_state_clk()
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| D | sienna_cichlid_ppt.c | 982 dpm_table = &dpm_context->dpm_tables.gfx_table; in sienna_cichlid_set_default_dpm_table()
1489 struct smu_11_0_dpm_table *gfx_table = in sienna_cichlid_populate_umd_state_clk() local
1490 &dpm_context->dpm_tables.gfx_table; in sienna_cichlid_populate_umd_state_clk()
1499 pstate_table->gfxclk_pstate.min = gfx_table->min; in sienna_cichlid_populate_umd_state_clk()
1500 pstate_table->gfxclk_pstate.peak = gfx_table->max; in sienna_cichlid_populate_umd_state_clk()
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| /linux-6.14.4/drivers/gpu/drm/amd/pm/swsmu/smu14/ |
| D | smu_v14_0_2_ppt.c | 526 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v14_0_2_set_default_dpm_table()
827 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v14_0_2_get_dpm_ultimate_freq()
1085 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v14_0_2_print_clk_levels()
1410 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v14_0_2_force_clk_levels()
1567 struct smu_14_0_dpm_table *gfx_table = in smu_v14_0_2_populate_umd_state_clk() local
1568 &dpm_context->dpm_tables.gfx_table; in smu_v14_0_2_populate_umd_state_clk()
1586 pstate_table->gfxclk_pstate.min = gfx_table->min; in smu_v14_0_2_populate_umd_state_clk()
1588 (driver_clocks.GameClockAc < gfx_table->max)) in smu_v14_0_2_populate_umd_state_clk()
1591 pstate_table->gfxclk_pstate.peak = gfx_table->max; in smu_v14_0_2_populate_umd_state_clk()
1609 driver_clocks.BaseClockAc < gfx_table->max) in smu_v14_0_2_populate_umd_state_clk()
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| D | smu_v14_0.c | 1191 struct smu_14_0_dpm_table *gfx_table = in smu_v14_0_set_performance_level() local
1192 &dpm_context->dpm_tables.gfx_table; in smu_v14_0_set_performance_level()
1217 sclk_min = sclk_max = gfx_table->max; in smu_v14_0_set_performance_level()
1225 sclk_min = sclk_max = gfx_table->min; in smu_v14_0_set_performance_level()
1233 sclk_min = gfx_table->min; in smu_v14_0_set_performance_level()
1234 sclk_max = gfx_table->max; in smu_v14_0_set_performance_level()
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| /linux-6.14.4/drivers/gpu/drm/amd/pm/swsmu/inc/ |
| D | smu_v14_0.h | 92 struct smu_14_0_dpm_table gfx_table; member
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| D | smu_v13_0.h | 93 struct smu_13_0_dpm_table gfx_table; member
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| D | smu_v11_0.h | 103 struct smu_11_0_dpm_table gfx_table; member
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