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Searched refs:ITM_STIM_DISABLED_Pos (Results 1 – 16 of 16) sorted by relevance

/btstack/port/stm32-l451-miromico-sx1280/Drivers/CMSIS/Include/
H A Dcore_armv8mml.h1125 #define ITM_STIM_DISABLED_Pos 1U /*!< ITM … macro
1126 #define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM …
H A Dcore_cm33.h1125 #define ITM_STIM_DISABLED_Pos 1U /*!< ITM … macro
1126 #define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM …
/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Core/Include/
H A Dcore_armv8mml.h1125 #define ITM_STIM_DISABLED_Pos 1U /*!< ITM … macro
1126 #define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM …
H A Dcore_cm33.h1125 #define ITM_STIM_DISABLED_Pos 1U /*!< ITM … macro
1126 #define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM …
/btstack/port/stm32-l476rg-nucleo-sx1280/Drivers/CMSIS/Include/
H A Dcore_armv8mml.h1042 #define ITM_STIM_DISABLED_Pos 1U /*!< ITM … macro
1043 #define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM …
H A Dcore_cm33.h1042 #define ITM_STIM_DISABLED_Pos 1U /*!< ITM … macro
1043 #define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM …
/btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Include/
H A Dcore_armv8mml.h1125 #define ITM_STIM_DISABLED_Pos 1U /*!< ITM … macro
1126 #define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM …
H A Dcore_cm33.h1125 #define ITM_STIM_DISABLED_Pos 1U /*!< ITM … macro
1126 #define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM …
/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Include/
H A Dcore_armv8mml.h1125 #define ITM_STIM_DISABLED_Pos 1U /*!< ITM … macro
1126 #define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM …
H A Dcore_cm33.h1125 #define ITM_STIM_DISABLED_Pos 1U /*!< ITM … macro
1126 #define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM …
/btstack/port/renesas-ek-ra6m4a-da14531/e2-project/ra/arm/CMSIS_5/CMSIS/Core/Include/
H A Dcore_cm35p.h1050 #define ITM_STIM_DISABLED_Pos 1U /*!< ITM … macro
1051 #define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM …
H A Dcore_armv8mml.h1050 #define ITM_STIM_DISABLED_Pos 1U /*!< ITM … macro
1051 #define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM …
H A Dcore_cm33.h1050 #define ITM_STIM_DISABLED_Pos 1U /*!< ITM … macro
1051 #define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM …
H A Dcore_cm55.h1112 #define ITM_STIM_DISABLED_Pos 1U /*!< ITM … macro
1113 #define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM …
H A Dcore_armv81mml.h1112 #define ITM_STIM_DISABLED_Pos 1U /*!< ITM … macro
1113 #define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM …
/btstack/port/renesas-tb-s1ja-cc256x/template/btstack_example/synergy/ssp/inc/bsp/cmsis/Include/
H A Dcore_armv8mml.h1078 #define ITM_STIM_DISABLED_Pos 1U /*!< ITM … macro
1079 #define ITM_STIM_DISABLED_Msk (0x1UL << ITM_STIM_DISABLED_Pos) /*!< ITM …