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Searched refs:ADC_TR1_HT1_Pos (Results 1 – 4 of 4) sorted by relevance

/btstack/port/stm32-wb55xx-nucleo-freertos/Drivers/CMSIS/Device/ST/STM32WBxx/Include/
H A Dstm32wb50xx.h1359 #define ADC_TR1_HT1_Pos (16U) macro
1360 #define ADC_TR1_HT1_Msk (0xFFFUL << ADC_TR1_HT1_Pos) /*!< 0x0FFF0000 */
1362 #define ADC_TR1_HT1_0 (0x001UL << ADC_TR1_HT1_Pos) /*!< 0x00010000 */
1363 #define ADC_TR1_HT1_1 (0x002UL << ADC_TR1_HT1_Pos) /*!< 0x00020000 */
1364 #define ADC_TR1_HT1_2 (0x004UL << ADC_TR1_HT1_Pos) /*!< 0x00040000 */
1365 #define ADC_TR1_HT1_3 (0x008UL << ADC_TR1_HT1_Pos) /*!< 0x00080000 */
1366 #define ADC_TR1_HT1_4 (0x010UL << ADC_TR1_HT1_Pos) /*!< 0x00100000 */
1367 #define ADC_TR1_HT1_5 (0x020UL << ADC_TR1_HT1_Pos) /*!< 0x00200000 */
1368 #define ADC_TR1_HT1_6 (0x040UL << ADC_TR1_HT1_Pos) /*!< 0x00400000 */
1369 #define ADC_TR1_HT1_7 (0x080UL << ADC_TR1_HT1_Pos) /*!< 0x00800000 */
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H A Dstm32wb55xx.h1582 #define ADC_TR1_HT1_Pos (16U) macro
1583 #define ADC_TR1_HT1_Msk (0xFFFUL << ADC_TR1_HT1_Pos) /*!< 0x0FFF0000 */
1585 #define ADC_TR1_HT1_0 (0x001UL << ADC_TR1_HT1_Pos) /*!< 0x00010000 */
1586 #define ADC_TR1_HT1_1 (0x002UL << ADC_TR1_HT1_Pos) /*!< 0x00020000 */
1587 #define ADC_TR1_HT1_2 (0x004UL << ADC_TR1_HT1_Pos) /*!< 0x00040000 */
1588 #define ADC_TR1_HT1_3 (0x008UL << ADC_TR1_HT1_Pos) /*!< 0x00080000 */
1589 #define ADC_TR1_HT1_4 (0x010UL << ADC_TR1_HT1_Pos) /*!< 0x00100000 */
1590 #define ADC_TR1_HT1_5 (0x020UL << ADC_TR1_HT1_Pos) /*!< 0x00200000 */
1591 #define ADC_TR1_HT1_6 (0x040UL << ADC_TR1_HT1_Pos) /*!< 0x00400000 */
1592 #define ADC_TR1_HT1_7 (0x080UL << ADC_TR1_HT1_Pos) /*!< 0x00800000 */
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/btstack/port/stm32-l451-miromico-sx1280/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
H A Dstm32l451xx.h1599 #define ADC_TR1_HT1_Pos (16U) macro
1600 #define ADC_TR1_HT1_Msk (0xFFFUL << ADC_TR1_HT1_Pos) /*!< 0x0FFF0000 */
1602 #define ADC_TR1_HT1_0 (0x001UL << ADC_TR1_HT1_Pos) /*!< 0x00010000 */
1603 #define ADC_TR1_HT1_1 (0x002UL << ADC_TR1_HT1_Pos) /*!< 0x00020000 */
1604 #define ADC_TR1_HT1_2 (0x004UL << ADC_TR1_HT1_Pos) /*!< 0x00040000 */
1605 #define ADC_TR1_HT1_3 (0x008UL << ADC_TR1_HT1_Pos) /*!< 0x00080000 */
1606 #define ADC_TR1_HT1_4 (0x010UL << ADC_TR1_HT1_Pos) /*!< 0x00100000 */
1607 #define ADC_TR1_HT1_5 (0x020UL << ADC_TR1_HT1_Pos) /*!< 0x00200000 */
1608 #define ADC_TR1_HT1_6 (0x040UL << ADC_TR1_HT1_Pos) /*!< 0x00400000 */
1609 #define ADC_TR1_HT1_7 (0x080UL << ADC_TR1_HT1_Pos) /*!< 0x00800000 */
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/btstack/port/stm32-l476rg-nucleo-sx1280/Drivers/CMSIS/Device/ST/STM32L4xx/Include/
H A Dstm32l476xx.h1859 #define ADC_TR1_HT1_Pos (16U) macro
1860 #define ADC_TR1_HT1_Msk (0xFFFUL << ADC_TR1_HT1_Pos) /*!< 0x0FFF0000 */
1862 #define ADC_TR1_HT1_0 (0x001UL << ADC_TR1_HT1_Pos) /*!< 0x00010000 */
1863 #define ADC_TR1_HT1_1 (0x002UL << ADC_TR1_HT1_Pos) /*!< 0x00020000 */
1864 #define ADC_TR1_HT1_2 (0x004UL << ADC_TR1_HT1_Pos) /*!< 0x00040000 */
1865 #define ADC_TR1_HT1_3 (0x008UL << ADC_TR1_HT1_Pos) /*!< 0x00080000 */
1866 #define ADC_TR1_HT1_4 (0x010UL << ADC_TR1_HT1_Pos) /*!< 0x00100000 */
1867 #define ADC_TR1_HT1_5 (0x020UL << ADC_TR1_HT1_Pos) /*!< 0x00200000 */
1868 #define ADC_TR1_HT1_6 (0x040UL << ADC_TR1_HT1_Pos) /*!< 0x00400000 */
1869 #define ADC_TR1_HT1_7 (0x080UL << ADC_TR1_HT1_Pos) /*!< 0x00800000 */
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