Searched refs:vs_inputs (Results 1 – 10 of 10) sorted by relevance
| /aosp_15_r20/external/mesa3d/src/imagination/rogue/ |
| H A D | rogue_compile.c | 192 rogue_vertex_inputs *vs_inputs = &b->shader->ctx->stage_data.vs.inputs; in trans_nir_intrinsic_load_input_vs() local
193 assert(input < vs_inputs->num_input_vars); in trans_nir_intrinsic_load_input_vs()
194 assert(component < vs_inputs->components[input]); in trans_nir_intrinsic_load_input_vs()
196 vtxin_index = vs_inputs->base[input] + component; in trans_nir_intrinsic_load_input_vs()
|
| /aosp_15_r20/external/mesa3d/src/amd/vulkan/nir/ |
| H A D | radv_nir_lower_vs_inputs.c | 42 nir_def *input_args[2] = {ac_nir_load_arg(b, &s->args->ac, s->args->vs_inputs[location]), NULL}; in lower_load_vs_input_from_prolog()
47 input_args[1] = ac_nir_load_arg(b, &s->args->ac, s->args->vs_inputs[location + 1]); in lower_load_vs_input_from_prolog()
|
| /aosp_15_r20/external/mesa3d/src/amd/vulkan/ |
| H A D | radv_shader_args.h | 100 struct ac_arg vs_inputs[MAX_VERTEX_ATTRIBS]; member
|
| H A D | radv_shader_args.c | 193 ac_add_arg(&args->ac, AC_ARG_VGPR, 4, AC_ARG_INT, &args->vs_inputs[i]); in declare_vs_input_vgprs()
194 args->ac.args[args->vs_inputs[i].arg_index].pending_vmem = true; in declare_vs_input_vgprs()
|
| /aosp_15_r20/external/mesa3d/src/intel/blorp/ |
| H A D | blorp_priv.h | 254 struct blorp_vs_inputs vs_inputs; member
|
| H A D | blorp_genX_exec_elk.h | 364 assert(sizeof(params->vs_inputs) == 16); in blorp_emit_input_varying_data()
365 memcpy(inputs, ¶ms->vs_inputs, sizeof(params->vs_inputs)); in blorp_emit_input_varying_data()
|
| H A D | blorp_genX_exec_brw.h | 352 assert(sizeof(params->vs_inputs) == 16); in blorp_emit_input_varying_data()
353 memcpy(inputs, ¶ms->vs_inputs, sizeof(params->vs_inputs)); in blorp_emit_input_varying_data()
|
| H A D | blorp_clear.c | 1107 params.vs_inputs.base_layer = start_layer; in blorp_clear_attachments()
|
| /aosp_15_r20/external/mesa3d/src/gallium/auxiliary/tgsi/ |
| H A D | tgsi_ureg.c | 130 unsigned vs_inputs[PIPE_MAX_ATTRIBS/32]; member
361 assert(index / 32 < ARRAY_SIZE(ureg->vs_inputs)); in ureg_DECL_vs_input()
363 ureg->vs_inputs[index/32] |= 1 << (index % 32); in ureg_DECL_vs_input()
1861 if (ureg->vs_inputs[i/32] & (1u << (i%32))) { in emit_decls()
|
| /aosp_15_r20/external/mesa3d/docs/relnotes/ |
| H A D | 23.1.0.rst | 5306 - aco: Generalize vs_inputs to args_pending_vmem.
|