Searched refs:max_num_temporal_layers (Results 1 – 5 of 5) sorted by relevance
224 enc->enc_pic.layer_ctrl.max_num_temporal_layers = 1; in radeon_uvd_enc_layer_control()228 RADEON_ENC_CS(enc->enc_pic.layer_ctrl.max_num_temporal_layers); in radeon_uvd_enc_layer_control()389 radeon_uvd_enc_code_fixed_bits(enc, enc->enc_pic.layer_ctrl.max_num_temporal_layers - 1, 3); in radeon_uvd_enc_nalu_sps_hevc()399 for (i = 0; i < (enc->enc_pic.layer_ctrl.max_num_temporal_layers - 1); i++) in radeon_uvd_enc_nalu_sps_hevc()402 if ((enc->enc_pic.layer_ctrl.max_num_temporal_layers - 1) > 0) { in radeon_uvd_enc_nalu_sps_hevc()403 for (i = (enc->enc_pic.layer_ctrl.max_num_temporal_layers - 1); i < 8; i++) in radeon_uvd_enc_nalu_sps_hevc()590 radeon_uvd_enc_code_fixed_bits(enc, enc->enc_pic.layer_ctrl.max_num_temporal_layers - 1, 3); in radeon_uvd_enc_nalu_vps_hevc()601 for (i = 0; i < (enc->enc_pic.layer_ctrl.max_num_temporal_layers - 1); i++) in radeon_uvd_enc_nalu_vps_hevc()604 if ((enc->enc_pic.layer_ctrl.max_num_temporal_layers - 1) > 0) { in radeon_uvd_enc_nalu_vps_hevc()605 for (i = (enc->enc_pic.layer_ctrl.max_num_temporal_layers - 1); i < 8; i++) in radeon_uvd_enc_nalu_vps_hevc()
148 uint32_t max_num_temporal_layers; member
109 enc->enc_pic.layer_ctrl.max_num_temporal_layers = enc->enc_pic.num_temporal_layers; in radeon_enc_layer_control()113 RADEON_ENC_CS(enc->enc_pic.layer_ctrl.max_num_temporal_layers); in radeon_enc_layer_control()
497 radeon_emit(cs, rc_layer_control->max_num_temporal_layers); // max num temporal layesr in radv_enc_layer_control()1751 vid->rc_layer_control.max_num_temporal_layers = 1; in set_rate_control_defaults()1833 vid->rc_layer_control.max_num_temporal_layers = h264_rate_control->temporalLayerCount; in radv_video_enc_control_video_coding()1836 vid->rc_layer_control.max_num_temporal_layers = h265_rate_control->subLayerCount; in radv_video_enc_control_video_coding()
251 uint32_t max_num_temporal_layers; member