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Searched refs:dup_immediate (Results 1 – 3 of 3) sorted by relevance

/aosp_15_r20/external/vixl/src/aarch64/
H A Dsimulator-aarch64.cc712 dup_immediate(kFormatVnB, ones, 0xff); in ExpandToSimVRegister()
721 dup_immediate(kFormatVnB, zero, 0); in ExtractFromSimVRegister()
7934 dup_immediate(vf, rd, ReadXRegister(instr->GetRn())); in VisitNEONCopy()
9430 dup_immediate(vform, ReadVRegister(instr->GetRd()), imm); in VisitSVEBroadcastBitmaskImm()
9509 dup_immediate(vform, scratch, shift_dist); in VisitSVEBitwiseShiftByImm_Predicated()
9666 dup_immediate(vform, scratch, shift_dist); in VisitSVEBitwiseShiftUnpredicated()
9747 dup_immediate(vform, in VisitSVEIncDecVectorByElementCount()
9844 dup_immediate(vform, in VisitSVESaturatingIncDecVectorByElementCount()
9990 dup_immediate(vform, add_sub_imm, i1 ? one : half); in VisitSVEFPArithmeticWithImm_Predicated()
9991 dup_immediate(vform, min_max_imm, i1 ? one : 0); in VisitSVEFPArithmeticWithImm_Predicated()
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H A Dlogic-aarch64.cc542 LogicVRegister imm_reg = dup_immediate(vform, temp, imm); in cmp()
1492 LogicVRegister shiftreg = dup_immediate(vform, temp, shift); in shl()
1503 LogicVRegister shiftreg = dup_immediate(vform, temp1, shift); in sshll()
1515 LogicVRegister shiftreg = dup_immediate(vform, temp1, shift); in sshll2()
1543 LogicVRegister shiftreg = dup_immediate(vform, temp1, shift); in ushll()
1555 LogicVRegister shiftreg = dup_immediate(vform, temp1, shift); in ushll2()
1673 LogicVRegister shiftreg = dup_immediate(vform, temp, shift); in sqshl()
1684 LogicVRegister shiftreg = dup_immediate(vform, temp, shift); in uqshl()
1695 LogicVRegister shiftreg = dup_immediate(vform, temp, shift); in sqshlu()
1732 LogicVRegister shiftreg = dup_immediate(vform, temp, -shift); in ushr()
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H A Dsimulator-aarch64.h3400 LogicVRegister dup_immediate(VectorFormat vform,