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/linux-6.14.4/Documentation/devicetree/bindings/mmc/
Dsocionext,uniphier-sd.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/socionext,uniphier-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <[email protected]>
16 - socionext,uniphier-sd-v2.91
17 - socionext,uniphier-sd-v3.1
18 - socionext,uniphier-sd-v3.1.1
32 dma-names:
33 const: rx-tx
[all …]
Dcdns,sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <[email protected]>
15 - enum:
16 - amd,pensando-elba-sd4hc
17 - microchip,mpfs-sd4hc
18 - microchip,pic64gx-sd4hc
19 - socionext,uniphier-sd4hc
20 - const: cdns,sd4hc
[all …]
Dmmc-controller-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <[email protected]>
14 possible slots or ports for multi-slot controllers.
17 "#address-cells":
22 "#size-cells":
29 broken-cd:
34 cd-gpios:
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Dsdhci-st.txt1 * STMicroelectronics sdhci-st MMC/SD controller
5 used by the sdhci-st driver.
8 - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407"
13 - clock-names: Should be "mmc" and "icn". (NB: The latter is not compulsory)
14 See: Documentation/devicetree/bindings/resource-names.txt
15 - clocks: Phandle to the clock.
16 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
18 - interrupts: One mmc interrupt should be described here.
19 - interrupt-names: Should be "mmcirq".
21 - pinctrl-names: A pinctrl state names "default" must be defined.
[all …]
Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ulf Hansson <[email protected]>
14 - $ref: sdhci-common.yaml#
19 - enum:
20 - ti,am62-sdhci
21 - ti,am64-sdhci-4bit
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Dbrcm,sdhci-brcmstb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/brcm,sdhci-brcmstb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Al Cooper <[email protected]>
11 - Florian Fainelli <[email protected]>
16 - items:
17 - enum:
18 - brcm,bcm7216-sdhci
19 - const: brcm,bcm7445-sdhci
[all …]
/linux-6.14.4/arch/arm64/boot/dts/amlogic/
Dmeson-g12b-dreambox-two.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-g12b-dreambox.dtsi"
11 compatible = "dream,dreambox-two", "amlogic,s922x", "amlogic,g12b";
16 sd-uhs-sdr12;
17 sd-uhs-sdr25;
18 sd-uhs-sdr50;
19 sd-uhs-sdr104;
/linux-6.14.4/arch/arm64/boot/dts/freescale/
Dtqmls10xxa.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright (c) 2018-2023 TQ-Systems GmbH <[email protected]-group.com>,
4 * D-82229 Seefeld, Germany.
11 reg_vcc3v3: regulator-vcc3v3 {
12 compatible = "regulator-fixed";
13 regulator-name = "VCC3V3";
14 regulator-min-microvolt = <3300000>;
15 regulator-max-microvolt = <3300000>;
16 regulator-always-on;
23 temperature-sensor@18 {
[all …]
Dfsl-ls1012a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include "fsl-ls1012a.dtsi"
15 compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
29 sd-uhs-sdr104;
30 sd-uhs-sdr50;
31 sd-uhs-sdr25;
32 sd-uhs-sdr12;
37 mmc-hs200-1_8v;
[all …]
Dfsl-lx2160a-clearfog-itx.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
10 #include "fsl-lx2160a-cex7.dtsi"
11 #include <dt-bindings/input/linux-event-codes.h>
20 stdout-path = "serial0:115200n8";
23 gpio-keys {
24 compatible = "gpio-keys";
28 linux,can-disable;
34 sfp0: sfp-0 {
36 i2c-bus = <&sfp0_i2c>;
[all …]
Dfsl-ls1046a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1046A family SoC.
6 * Copyright 2019-2020 NXP
11 /dts-v1/;
13 #include "fsl-ls1046a.dtsi"
17 compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
27 stdout-path = "serial0:115200n8";
40 mmc-hs200-1_8v;
41 sd-uhs-sdr104;
42 sd-uhs-sdr50;
[all …]
Dfsl-lx2160a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 // Copyright 2018-2020 NXP
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-rdb", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "MC34717-3.3VSB";
29 regulator-min-microvolt = <3300000>;
[all …]
/linux-6.14.4/arch/arm64/boot/dts/sprd/
Dums512-1h10.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Unisoc UMS512-1h10 boards DTS file
8 /dts-v1/;
13 model = "Unisoc UMS512-1H10 Board";
15 compatible = "sprd,ums512-1h10", "sprd,ums512";
28 stdout-path = "serial1:115200n8";
42 bus-width = <4>;
43 no-sdio;
44 no-mmc;
45 sprd,phy-delay-sd-uhs-sdr104 = <0x7f 0x73 0x72 0x72>;
[all …]
/linux-6.14.4/include/linux/mmc/
Dsd_uhs2.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Header file for UHS-II packets, Host Controller registers and I/O
14 * Refer to UHS-II Addendum Version 1.02 Figure 5-2, the format of CCMD Header is described below:
32 * Refer to UHS-II Addendum Version 1.02 Figure 6-5, the format of CCMD Argument is described below:
45 * I/O Address specifies the address of register in UHS-II I/O space accessed by CCMD.
112 * Refer to UHS-II Addendum Version 1.02 Figure 6-8, the format of DCMD Argument is described below:
124 * I/O Address specifies the address of register in UHS-II I/O space accessed by CCMD.
161 /* UHS-II Device Registers */
203 /* LINK-TRAN Caps and Settings registers */
/linux-6.14.4/arch/riscv/boot/dts/microchip/
Dmpfs-polarberry.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2022 Microchip Technology Inc */
4 /dts-v1/;
7 #include "mpfs-polarberry-fabric.dtsi"
19 stdout-path = "serial0:115200n8";
38 phy-mode = "sgmii";
39 phy-handle = <&phy0>;
44 phy-mode = "sgmii";
45 phy-handle = <&phy1>;
48 phy1: ethernet-phy@5 {
[all …]
Dmpfs-sev-kit.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
7 #include "mpfs-sev-kit-fabric.dtsi"
10 #address-cells = <2>;
11 #size-cells = <2>;
12 model = "Microchip PolarFire-SoC SEV Kit";
13 compatible = "microchip,mpfs-sev-kit", "microchip,mpfs";
25 stdout-path = "serial1:115200n8";
28 reserved-memory {
29 #address-cells = <2>;
[all …]
Dmpfs-m100pfsevp.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Original all-in-one devicetree:
4 * Copyright (C) 2021-2022 - Wolfgang Grandegger <wg@aries-embedded.de>
6 * Copyright (C) 2022 - Conor Dooley <[email protected]>
8 /dts-v1/;
11 #include "mpfs-m100pfs-fabric.dtsi"
30 stdout-path = "serial1:115200n8";
63 pmic-irq-hog {
64 gpio-hog;
69 /* Set to low for eMMC, high for SD-card */
[all …]
Dmpfs-beaglev-fire.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
6 #include <dt-bindings/gpio/gpio.h>
8 #include "mpfs-beaglev-fire-fabric.dtsi"
14 #address-cells = <2>;
15 #size-cells = <2>;
16 model = "BeagleBoard BeagleV-Fire";
17 compatible = "beagle,beaglev-fire", "microchip,mpfs";
28 stdout-path = "serial0:115200n8";
[all …]
Dmpfs-icicle-kit.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
7 #include "mpfs-icicle-kit-fabric.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
12 model = "Microchip PolarFire-SoC Icicle Kit";
13 compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit",
26 stdout-path = "serial1:115200n8";
30 compatible = "gpio-leds";
[all …]
/linux-6.14.4/drivers/mmc/core/
Dsd_uhs2.c1 // SPDX-License-Identifier: GPL-2.0-only
21 * Support for SD UHS-II cards
51 if (host->ios.power_mode == MMC_POWER_ON) in sd_uhs2_power_up()
54 host->ios.vdd = fls(host->ocr_avail) - 1; in sd_uhs2_power_up()
55 host->ios.clock = host->f_init; in sd_uhs2_power_up()
56 host->ios.timing = MMC_TIMING_UHS2_SPEED_A; in sd_uhs2_power_up()
57 host->ios.power_mode = MMC_POWER_ON; in sd_uhs2_power_up()
59 return host->ops->uhs2_control(host, UHS2_SET_IOS); in sd_uhs2_power_up()
66 if (host->ios.power_mode == MMC_POWER_OFF) in sd_uhs2_power_off()
69 host->ios.vdd = 0; in sd_uhs2_power_off()
[all …]
/linux-6.14.4/arch/arm64/boot/dts/rockchip/
Dpx30-firefly-jd4-core-mb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/leds/common.h>
9 #include "px30-firefly-jd4-core.dtsi"
12 compatible = "firefly,px30-jd4-core-mb", "firefly,px30-jd4-core",
14 model = "Firefly Core-PX30-JD4 on MB-JD4-PX30 baseboard";
24 stdout-path = "serial2:115200n8";
27 dc_12v: regulator-dc-12v {
28 compatible = "regulator-fixed";
[all …]
/linux-6.14.4/arch/arm/boot/dts/rockchip/
Drk3288-veyron-sdmmc.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
15 sdcard-supply = <&vccio_sd>;
24 sdmmc_bus4: sdmmc-bus4 {
31 sdmmc_clk: sdmmc-clk {
35 sdmmc_cmd: sdmmc-cmd {
45 sdmmc_cd_disabled: sdmmc-cd-disabled {
50 sdmmc_cd_pin: sdmmc-cd-pin {
57 vcc9-supply = <&vcc_5v>;
61 regulator-name = "vccio_sd";
62 regulator-min-microvolt = <1800000>;
[all …]
/linux-6.14.4/arch/arm/boot/dts/st/
Dstih410-b2120.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include "stihxxx-b2120.dtsi"
11 compatible = "st,stih410-b2120", "st,stih410";
14 stdout-path = &sbc_serial0;
38 max-frequency = <200000000>;
39 sd-uhs-sdr50;
40 sd-uhs-sdr104;
41 sd-uhs-ddr50;
60 sti-display-subsystem@0 {
[all …]
Dstih418-b2199.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
11 compatible = "st,stih418-b2199", "st,stih418";
14 stdout-path = &sbc_serial0;
28 compatible = "gpio-leds";
29 led-red {
32 linux,default-trigger = "heartbeat";
34 led-green {
36 default-state = "off";
[all …]
/linux-6.14.4/drivers/mmc/host/
Dsdhci-st.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Based on sdhci-cns3xxx.c
18 #include "sdhci-pltfm.h"
88 #define ST_TOP_MMC_DLY_FIX_OFF(x) (x - 0x8)
102 /* register to provide the phase-shift value for DLL */
119 * DLL procedure has finished before switching to ultra-speed modes.
139 * flashSS sub-system which needs to be configured to be compliant to eMMC 4.5
145 struct mmc_host *mhost = host->mmc; in st_mmcss_cconfig()
148 if (!of_device_is_compatible(np, "st,sdhci-stih407")) in st_mmcss_cconfig()
157 host->ioaddr + ST_MMC_CCONFIG_REG_1); in st_mmcss_cconfig()
[all …]

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