| /linux-6.14.4/tools/testing/selftests/kvm/arm64/ |
| D | arch_timer_edge_cases.c | 6 * - timers above the max TVAL value.
26 /* tval is a signed 32-bit int. */
357 static void test_timer_tval(enum arch_timer timer, int32_t tval, in test_timer_tval() argument
361 test_timer_xval(timer, (uint64_t) tval, TIMER_TVAL, wm, reset_state, in test_timer_tval()
387 static void test_tval_no_irq(enum arch_timer timer, int32_t tval, uint64_t usec, in test_tval_no_irq() argument
390 /* tval will be cast to an int32_t in test_xval_check_no_irq */ in test_tval_no_irq()
391 test_xval_check_no_irq(timer, (uint64_t) tval, usec, TIMER_TVAL, wm); in test_tval_no_irq()
460 * Set a timer for tval=delta_1_ms then reprogram it to
461 * tval=delta_2_ms. Check that we get the timer fired. There is no
506 int32_t tval = (int32_t) msec_to_cycles(test_args.wait_ms); in test_basic_functionality() local
[all …]
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| D | arch_timer.c | 4 * CVAL and TVAL registers.
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| D | vpmu_counter_access.c | 182 "tval: 0x%lx; mask: 0x%lx; set_expected: %u", \
186 "tval: 0x%lx; mask: 0x%lx; set_expected: %u", \
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| /linux-6.14.4/arch/loongarch/kvm/ |
| D | timer.c | 83 * If oneshot timer is fired, CSR TVAL will be -1, there are two in kvm_restore_timer()
95 * and set CSR TVAL with -1 in kvm_restore_timer()
101 * timer interrupt, and CSR TVAL keeps unchanged with -1, it in kvm_restore_timer()
149 * If period timer is fired, CSR TVAL will be reloaded from CSR TCFG in _kvm_save_timer()
150 * If oneshot timer is fired, CSR TVAL will be -1 in _kvm_save_timer()
151 * Here judge one-shot timer fired by checking whether TVAL is larger in _kvm_save_timer()
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| /linux-6.14.4/tools/testing/selftests/kvm/include/arm64/ |
| D | arch_timer.h | 82 static inline void timer_set_tval(enum arch_timer timer, int32_t tval) in timer_set_tval() argument
86 write_sysreg(tval, cntv_tval_el0); in timer_set_tval()
89 write_sysreg(tval, cntp_tval_el0); in timer_set_tval()
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| /linux-6.14.4/drivers/pinctrl/ |
| D | pinctrl-cy8c95x0.c | 619 DECLARE_BITMAP(tval, MAX_LINE); in cy8c95x0_write_regs_mask()
629 bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE); in cy8c95x0_write_regs_mask()
630 bitmap_shift_left(tval, tval, 4, MAX_LINE); in cy8c95x0_write_regs_mask()
631 bitmap_replace(tval, tval, val, chip->shiftmask, BANK_SZ * 3); in cy8c95x0_write_regs_mask()
639 write_val = bitmap_get_value8(tval, i * BANK_SZ); in cy8c95x0_write_regs_mask()
655 DECLARE_BITMAP(tval, MAX_LINE); in cy8c95x0_read_regs_mask()
666 bitmap_andnot(tval, val, chip->shiftmask, MAX_LINE); in cy8c95x0_read_regs_mask()
667 bitmap_shift_left(tval, tval, 4, MAX_LINE); in cy8c95x0_read_regs_mask()
668 bitmap_replace(tval, tval, val, chip->shiftmask, BANK_SZ * 3); in cy8c95x0_read_regs_mask()
683 read_val |= bitmap_get_value8(tval, i * BANK_SZ) & ~bits; in cy8c95x0_read_regs_mask()
[all …]
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| /linux-6.14.4/Documentation/devicetree/bindings/timer/ |
| D | arm,arch_timer.yaml | 75 affects writes to the tval register, due to the implicit counter read.
81 by back-to-back reads. This also affects writes to the tval register, due
89 the tval registers, due to the implicit counter read.
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| /linux-6.14.4/arch/arm/kernel/ |
| D | module-plts.c | 113 u32 *tval = (u32 *)(base + rel->r_offset); in is_zero_addend_relocation() local
126 upper = __mem_to_opcode_thumb16(((u16 *)tval)[0]); in is_zero_addend_relocation()
127 lower = __mem_to_opcode_thumb16(((u16 *)tval)[1]); in is_zero_addend_relocation()
134 return (__mem_to_opcode_arm(*tval) & 0xffffff) == 0xfffffe; in is_zero_addend_relocation()
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| /linux-6.14.4/drivers/thermal/ |
| D | amlogic_thermal.c | 179 unsigned int tval; in amlogic_thermal_get_temp() local
185 regmap_read(pdata->regmap, TSENSOR_STAT0, &tval); in amlogic_thermal_get_temp()
188 tval & TSENSOR_READ_TEMP_MASK); in amlogic_thermal_get_temp()
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| /linux-6.14.4/drivers/char/mwave/ |
| D | 3780i.c | 195 unsigned short tval; in dsp3780I_EnableDSP() local
296 MKWORD(tval) = InWordDsp(DSP_IsaSlaveControl); in dsp3780I_EnableDSP()
299 "3780i::dsp3780i_EnableDSP rSlaveControl 2 %x\n", tval); in dsp3780I_EnableDSP()
308 MKWORD(tval) = InWordDsp(DSP_IsaSlaveControl); in dsp3780I_EnableDSP()
311 "3780i::dsp3780i_EnableDSP rSlaveControl 3 %x\n", tval); in dsp3780I_EnableDSP()
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| /linux-6.14.4/drivers/isdn/mISDN/ |
| D | tei.c | 472 mISDN_FsmAddTimer(&tm->timer, tm->tval, EV_TIMER, NULL, 1); in tei_id_request()
592 mISDN_FsmAddTimer(&tm->timer, tm->tval, EV_TIMER, NULL, 2); in tei_id_verify()
607 mISDN_FsmAddTimer(&tm->timer, tm->tval, EV_TIMER, NULL, 3); in tei_id_req_tout()
626 mISDN_FsmAddTimer(&tm->timer, tm->tval, EV_TIMER, NULL, 4); in tei_id_ver_tout()
690 mISDN_FsmAddTimer(&tm->timer, tm->tval, EV_TIMER, NULL, 2); in tei_id_chk_req_net()
742 mISDN_FsmAddTimer(&tm->timer, tm->tval, EV_TIMER, NULL, 4); in tei_id_ver_tout_net()
819 l2->tm->tval = 2000; /* T202 2 sec */ in create_new_tei()
1063 l2->tm->tval = 1000; /* T201 1 sec */ in create_teimgr()
1071 l2->tm->tval = 2000; /* T202 2 sec */ in create_teimgr()
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| D | layer2.h | 33 int tval, nval; member
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| /linux-6.14.4/drivers/acpi/apei/ |
| D | einj-core.c | 681 u32 tval, vendor, available_error_type = 0; in einj_validate_error_type() local
693 tval = type & GENMASK(30, 0); in einj_validate_error_type()
696 if (tval & (tval - 1)) in einj_validate_error_type()
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| /linux-6.14.4/drivers/tty/serial/8250/ |
| D | 8250_bcm7271.c | 561 u32 tval; in brcmuart_isr() local
575 tval = UDMA_IS_TX_INTERRUPT(interrupts); in brcmuart_isr()
576 if (tval) in brcmuart_isr()
577 brcmuart_tx_isr(up, tval); in brcmuart_isr()
578 if ((rval | tval) == 0) in brcmuart_isr()
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| /linux-6.14.4/arch/x86/kernel/cpu/resctrl/ |
| D | monitor.c | 599 u64 tval = 0; in __mon_event_count() local
614 rr->evtid, &tval, rr->arch_mon_ctx); in __mon_event_count()
618 rr->val += tval; in __mon_event_count()
639 rr->evtid, &tval, rr->arch_mon_ctx); in __mon_event_count()
641 rr->val += tval; in __mon_event_count()
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| /linux-6.14.4/include/uapi/linux/ |
| D | ip.h | 152 __be32 tval; member
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| /linux-6.14.4/drivers/power/supply/ |
| D | bq27xxx_battery.c | 1752 int tval; local
1754 tval = bq27xxx_read(di, reg, false);
1755 if (tval < 0) {
1757 reg, tval);
1758 return tval;
1761 if (tval == 65535)
1764 val->intval = tval * 60;
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| /linux-6.14.4/drivers/rapidio/switches/ |
| D | idtcps.c | 143 /* set TVAL = ~50us */ in idtcps_probe()
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| D | idt_gen3.c | 207 /* set TVAL = ~50us */ in idtg3_em_init()
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| D | idt_gen2.c | 314 /* set TVAL = ~50us */ in idtg2_em_init()
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| /linux-6.14.4/drivers/clocksource/ |
| D | arm_arch_timer.c | 833 * XGene-1 implements CVAL in terms of TVAL, meaning in __arch_timer_check_delta()
836 * Note that TVAL is signed, thus has only 31 of its in __arch_timer_check_delta()
846 pr_warn_once("Broken CNTx_CVAL_EL1, using 31 bit TVAL instead.\n"); in __arch_timer_check_delta()
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| /linux-6.14.4/net/ipv4/ |
| D | devinet.c | 1751 long tval = (jiffies - tstamp) / HZ; in inet_fill_ifaddr() local
1753 if (preferred > tval) in inet_fill_ifaddr()
1754 preferred -= tval; in inet_fill_ifaddr()
1758 if (valid > tval) in inet_fill_ifaddr()
1759 valid -= tval; in inet_fill_ifaddr()
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| /linux-6.14.4/Documentation/translations/zh_TW/arch/loongarch/ |
| D | introduction.rst | 127 0x42 定時器值 TVAL
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| /linux-6.14.4/Documentation/translations/zh_CN/arch/loongarch/ |
| D | introduction.rst | 127 0x42 定时器值 TVAL
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| /linux-6.14.4/Documentation/arch/loongarch/ |
| D | introduction.rst | 134 0x42 Timer Value TVAL
|