Searched +full:tegra194 +full:- +full:cbb +full:- +full:noc (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-cbb.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: NVIDIA Tegra194 CBB 1.010 - Sumit Gupta <[email protected]>13 The Control Backbone (CBB) is comprised of the physical path from an14 initiator to a target's register configuration space. CBB 1.0 has15 multiple hierarchical sub-NOCs (Network-on-Chip) and connects various19 by the NOCs inside the CBB. NOCs reporting errors are cluster NOCs[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved5 * The driver handles Error's from Control Backbone(CBB) generated due to6 * illegal accesses. When an error is reported from a NOC within CBB,7 * the driver checks ErrVld status of all three Error Logger's of that NOC.10 * TMO, SEC, UNS are the codes which are supported by CBB.25 #include <soc/tegra/tegra-cbb.h>113 bool format; // [31] = 1 -> FlexNoC versions 2.7 & above158 const struct tegra194_cbb_noc_data *noc; member176 static inline struct tegra194_cbb *to_tegra194_cbb(struct tegra_cbb *cbb) in to_tegra194_cbb() argument[all …]
1 // SPDX-License-Identifier: GPL-2.02 #include <dt-bindings/clock/tegra194-clock.h>3 #include <dt-bindings/gpio/tegra194-gpio.h>4 #include <dt-bindings/interrupt-controller/arm-gic.h>5 #include <dt-bindings/mailbox/tegra186-hsp.h>6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>8 #include <dt-bindings/power/tegra194-powergate.h>9 #include <dt-bindings/reset/tegra194-reset.h>10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>[all …]