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/linux-6.14.4/Documentation/devicetree/bindings/riscv/
Dcpus.yaml88 - riscv,sv48
218 mmu-type = "riscv,sv48";
/linux-6.14.4/arch/riscv/mm/
Dkasan_init.c15 * Kasan shadow region must lie at a fixed address across sv39, sv48 and sv57
21 * For sv48 and sv57, the region start is aligned on PGDIR_SIZE whereas the end
Dinit.c818 * meaning sv48 is supported.
/linux-6.14.4/Documentation/devicetree/bindings/cpu/
Didle-states.yaml785 mmu-type = "riscv,sv48";
801 mmu-type = "riscv,sv48";
817 mmu-type = "riscv,sv48";
833 mmu-type = "riscv,sv48";
/linux-6.14.4/Documentation/translations/zh_CN/arch/riscv/
Dvm-layout.rst71 RISC-V Linux Kernel SV48
/linux-6.14.4/arch/riscv/include/asm/
Dpage.h35 * define the PAGE_OFFSET value for SV48 and SV39.
Dpgtable.h919 * - 0x800000000000 ( 128TB) for RV64 using SV48 mmu
/linux-6.14.4/Documentation/arch/riscv/
Dvm-layout.rst67 RISC-V Linux Kernel SV48
/linux-6.14.4/drivers/iommu/riscv/
Diommu-bits.h358 * @RISCV_IOMMU_DC_IOHGATP_MODE_SV48X4: Sv48x4 (2-bit extension of Sv48), when fctl.GXL == 0
381 * @RISCV_IOMMU_DC_FSC_IOSATP_MODE_SV48: Sv48, when dc.tc.SXL == 0
/linux-6.14.4/arch/riscv/kernel/
Dcpu.c300 sv_type = "sv48"; in print_mmu()
/linux-6.14.4/tools/testing/selftests/kvm/lib/riscv/
Dprocessor.c202 * The RISC-V Sv48 MMU mode supports 56-bit physical address in riscv_vcpu_mmu_setup()