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/linux-6.14.4/include/linux/mmc/
Dhost.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #include <linux/fault-inject.h>
18 #include <linux/dma-direction.h>
19 #include <linux/blk-crypto-profile.h>
187 * ios->clock might be 0. For some controllers, setting 0Hz
197 * 1 for a read-only card
198 * -ENOSYS when not supported (equal to NULL callback)
207 * -ENOSYS when not supported (equal to NULL callback)
233 /* Optional callback to prepare for SD high-speed tuning */
236 /* Optional callback to execute SD high-speed tuning */
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/linux-6.14.4/drivers/infiniband/ulp/iser/
Discsi_iser.h7 * based on code maintained by open-[email protected]
11 * Copyright (c) 2013-2014 Mellanox Technologies. All rights reserved.
23 * - Redistributions of source code must retain the above
27 * - Redistributions in binary form must reproduce the above
58 #include <linux/dma-mapping.h>
125 * supports -EAGAIN scheme where tx is suspended till the QP has room for more *
145 - ISER_MAX_TX_MISC_PDUS \
146 - ISER_MAX_RX_MISC_PDUS) / \
181 * struct iser_data_buf - iSER data buffer
202 * struct iser_mem_reg - iSER memory registration info
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/linux-6.14.4/drivers/infiniband/hw/cxgb4/
Dcq.c2 * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
49 res_wr->op_nres = cpu_to_be32( in destroy_cq()
53 res_wr->len16_pkd = cpu_to_be32(DIV_ROUND_UP(wr_len, 16)); in destroy_cq()
54 res_wr->cookie = (uintptr_t)wr_waitp; in destroy_cq()
55 res = res_wr->res; in destroy_cq()
56 res->u.cq.restype = FW_RI_RES_TYPE_CQ; in destroy_cq()
57 res->u.cq.op = FW_RI_RES_OP_RESET; in destroy_cq()
58 res->u.cq.iqid = cpu_to_be32(cq->cqid); in destroy_cq()
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/linux-6.14.4/drivers/infiniband/ulp/rtrs/
Drtrs-pri.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (c) 2014 - 2018 ProfitBricks GmbH. All rights reserved.
6 * Copyright (c) 2018 - 2019 1&1 IONOS Cloud GmbH. All rights reserved.
7 * Copyright (c) 2019 - 2020 1&1 IONOS SE. All rights reserved.
29 * So the maximum sess_queue_depth is 65535 (2^16 - 1) in theory
38 MAX_IMM_TYPE_MASK = ((1 << MAX_IMM_TYPE_BITS) - 1),
40 MAX_IMM_PAYL_MASK = ((1 << MAX_IMM_PAYL_BITS) - 1),
128 struct ib_cqe cqe; member
136 * enum rtrs_msg_types - RTRS message types, see also rtrs/README
152 * enum rtrs_msg_flags - RTRS message flags.
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/linux-6.14.4/Documentation/devicetree/bindings/mmc/
Dmmc-controller-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <[email protected]>
14 possible slots or ports for multi-slot controllers.
17 "#address-cells":
22 "#size-cells":
29 broken-cd:
34 cd-gpios:
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Dsdhci-msm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDHCI controller (sdhci-msm)
10 - Bjorn Andersson <[email protected]>
11 - Konrad Dybcio <[email protected]>
15 Qualcomm SOCs supports SD/MMC/SDIO devices.
20 - enum:
21 - qcom,sdhci-msm-v4
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Dbrcm,sdhci-brcmstb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/brcm,sdhci-brcmstb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Al Cooper <[email protected]>
11 - Florian Fainelli <[email protected]>
16 - items:
17 - enum:
18 - brcm,bcm7216-sdhci
19 - const: brcm,bcm7445-sdhci
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/linux-6.14.4/drivers/infiniband/hw/vmw_pvrdma/
Dpvrdma_dev_api.h2 * Copyright (c) 2012-2016 VMware, Inc. All rights reserved.
7 * 2-Clause License. This program is distributed in the hope that it
11 * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
17 * The BSD 2-Clause License
23 * - Redistributions of source code must retain the above
27 * - Redistributions in binary form must reproduce the above
68 * Masks and accessors for page directory, which is a two-level lookup:
69 * page directory -> page table -> page. Only one directory for now, but we
83 * Max MSI-X vectors.
101 #define PVRDMA_CQ_FLAG_ARMED_SOL BIT(0) /* Armed for solicited-only. */
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/linux-6.14.4/drivers/net/ethernet/qlogic/qede/
Dqede_fp.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
34 /* In case lazy-allocation is allowed, postpone allocation until the in qede_alloc_rx_buffer()
38 if (allow_lazy && likely(rxq->filled_buffers > 12)) { in qede_alloc_rx_buffer()
39 rxq->filled_buffers--; in qede_alloc_rx_buffer()
45 return -ENOMEM; in qede_alloc_rx_buffer()
50 mapping = dma_map_page(rxq->dev, data, 0, in qede_alloc_rx_buffer()
51 PAGE_SIZE, rxq->data_direction); in qede_alloc_rx_buffer()
52 if (unlikely(dma_mapping_error(rxq->dev, mapping))) { in qede_alloc_rx_buffer()
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/linux-6.14.4/drivers/infiniband/hw/efa/
Defa_com.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 * Copyright 2018-2024 Amazon.com, Inc. or its affiliates. All rights reserved.
74 struct efa_com_mmio_read *mmio_read = &edev->mmio_read; in efa_com_reg_read32()
80 read_resp = mmio_read->read_resp; in efa_com_reg_read32()
82 spin_lock(&mmio_read->lock); in efa_com_reg_read32()
83 mmio_read->seq_num++; in efa_com_reg_read32()
86 read_resp->req_id = mmio_read->seq_num + 0x9aL; in efa_com_reg_read32()
89 mmio_read->seq_num); in efa_com_reg_read32()
91 writel(mmio_read_reg, edev->reg_bar + EFA_REGS_MMIO_REG_READ_OFF); in efa_com_reg_read32()
93 exp_time = jiffies + usecs_to_jiffies(mmio_read->mmio_read_timeout); in efa_com_reg_read32()
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/linux-6.14.4/drivers/mmc/host/
Dcqhci-crypto.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/blk-crypto.h>
9 #include <linux/blk-crypto-profile.h>
12 #include "cqhci-crypto.h"
14 /* Map from blk-crypto modes to CQHCI crypto algorithm IDs and key sizes */
28 return mmc_from_crypto_profile(profile)->cqe_private; in cqhci_host_from_crypto_profile()
35 u32 slot_offset = cq_host->crypto_cfg_register + slot * sizeof(*cfg); in cqhci_crypto_program_key()
39 cqhci_writel(cq_host, 0, slot_offset + 16 * sizeof(cfg->reg_val[0])); in cqhci_crypto_program_key()
43 cqhci_writel(cq_host, le32_to_cpu(cfg->reg_val[i]), in cqhci_crypto_program_key()
44 slot_offset + i * sizeof(cfg->reg_val[0])); in cqhci_crypto_program_key()
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Dsdhci-tegra.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
20 #include <linux/mmc/slot-gpio.h>
32 #include "sdhci-cqhci.h"
33 #include "sdhci-pltfm.h"
130 /* SDMMC CQE Base Address for Tegra Host Ver 4.1 and Higher */
192 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_readw()
194 if (unlikely((soc_data->nvquirks & NVQUIRK_FORCE_SDHCI_SPEC_200) && in tegra_sdhci_readw()
200 return readw(host->ioaddr + reg); in tegra_sdhci_readw()
213 pltfm_host->xfer_mode_shadow = val; in tegra_sdhci_writew()
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Dsdhci-msm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/mmc/host/sdhci-msm.c - Qualcomm SDHCI Platform driver
5 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
23 #include "sdhci-cqhci.h"
24 #include "sdhci-pltfm.h"
123 #define INVALID_TUNING_PHASE -1
140 /* Max load for eMMC Vdd-io supply */
146 /* Max load for SD Vdd-io supply */
150 msm_host->var_ops->msm_readl_relaxed(host, offset)
153 msm_host->var_ops->msm_writel_relaxed(val, host, offset)
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Dsdhci-brcmstb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * sdhci-brcmstb.c Support for SDHCI on Broadcom BRCMSTB SoC's
16 #include "sdhci-cqhci.h"
17 #include "sdhci-pltfm.h"
69 if (!(priv->flags & BRCMSTB_PRIV_FLAGS_GATE_CLOCK)) in enable_clock_gating()
81 /* Reset will clear this, so re-enable it */ in brcmstb_reset()
94 * bits, hence access SDHCI_CLOCK_CONTROL register as 32-bit register in brcmstb_sdhci_reset_cmd_data()
108 mmc_hostname(host->mmc), (int)mask); in brcmstb_sdhci_reset_cmd_data()
124 /* Reset will clear this, so re-enable it */ in brcmstb_reset_74165b0()
134 dev_dbg(mmc_dev(mmc), "%s(): Setting HS400-Enhanced-Strobe mode\n", in sdhci_brcmstb_hs400es()
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/linux-6.14.4/io_uring/
Drw.c1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/blk-mq.h>
40 if (req->flags & REQ_F_SUPPORT_NOWAIT) in io_file_supports_nowait()
46 return vfs_poll(req->file, &pt) & mask; in io_file_supports_nowait()
58 uiov = u64_to_user_ptr(rw->addr); in io_iov_compat_buffer_select_prep()
60 return -EFAULT; in io_iov_compat_buffer_select_prep()
61 if (__get_user(clen, &uiov->iov_len)) in io_iov_compat_buffer_select_prep()
62 return -EFAULT; in io_iov_compat_buffer_select_prep()
64 return -EINVAL; in io_iov_compat_buffer_select_prep()
66 rw->len = clen; in io_iov_compat_buffer_select_prep()
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/linux-6.14.4/drivers/net/ethernet/amazon/ena/
Dena_admin_defs.h1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
3 * Copyright 2015-2020 Amazon.com, Inc. or its affiliates. All rights reserved.
13 /* customer metrics - in correlation with
150 * 1 : ctrl_data - control buffer address valid
151 * 2 : ctrl_data_indirect - control buffer address
173 * 7:5 : sq_direction - 0x1 - Tx; 0x2 - Rx
224 * 7:5 : sq_direction - 0x1 - Tx, 0x2 - Rx
230 /* 3:0 : placement_policy - Describing where the SQ
232 * 0x1 - descriptors and headers are in OS memory,
233 * 0x3 - descriptors and headers in device memory
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/linux-6.14.4/drivers/nvme/target/
Dpci-epf.c1 // SPDX-License-Identifier: GPL-2.0
7 * REDS Institute, HEIG-VD, HES-SO, Switzerland
19 #include <linux/pci-epc.h>
20 #include <linux/pci-epf.h>
31 * allow up to 128 page-sized segments. For the maximum allowed,
36 (NVMET_PCI_EPF_MAX_SEGS << (PAGE_SHIFT - 10))
127 struct nvme_completion cqe; member
230 __le32 *bar_reg = ctrl->bar + off; in nvmet_pci_epf_bar_read32()
238 __le32 *bar_reg = ctrl->bar + off; in nvmet_pci_epf_bar_write32()
260 struct pci_epf *epf = nvme_epf->epf; in nvmet_pci_epf_mem_map()
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Dfc.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/blk-mq.h>
15 #include <linux/nvme-fc-driver.h>
16 #include <linux/nvme-fc.h>
32 struct list_head ls_rcv_list; /* tgtport->ls_rcv_list */
55 struct list_head lsreq_list; /* tgtport->ls_req_list */
60 /* desired maximum for a single sequence - if sg list allows it */
93 struct list_head fcp_list; /* tgtport->fcp_list */
187 #define NVMET_FC_QUEUEID_MASK ((u64)((1 << BYTES_FOR_QID_SHIFT) - 1))
192 return (assoc->association_id | qid); in nvmet_fc_makeconnid()
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Dcore.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (c) 2015-2016 HGST, a Western Digital Company.
10 #include <linux/pci-p2pdma.h>
36 * - subsystems list
37 * - per-subsystem allowed hosts list
38 * - allow_any_host subsystem attribute
39 * - nvmet_genctr
40 * - the nvmet_transports array
43 * while when reading (popolating discovery log page or checking host-subsystem
57 case -ENOSPC: in errno_to_nvme_status()
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/linux-6.14.4/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_cmn.c3 * Copyright (c) 2007-2013 Broadcom Corporation
47 netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), bnx2x_poll); in bnx2x_add_all_napi_cnic()
57 netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi), bnx2x_poll); in bnx2x_add_all_napi()
74 * bnx2x_move_fp - move content of the fastpath structure.
80 * Makes sure the contents of the bp->fp[to].napi is kept
88 struct bnx2x_fastpath *from_fp = &bp->fp[from]; in bnx2x_move_fp()
89 struct bnx2x_fastpath *to_fp = &bp->fp[to]; in bnx2x_move_fp()
90 struct bnx2x_sp_objs *from_sp_objs = &bp->sp_objs[from]; in bnx2x_move_fp()
91 struct bnx2x_sp_objs *to_sp_objs = &bp->sp_objs[to]; in bnx2x_move_fp()
92 struct bnx2x_fp_stats *from_fp_stats = &bp->fp_stats[from]; in bnx2x_move_fp()
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/linux-6.14.4/include/linux/
Dio_uring_types.h16 * Must not be used with requests generating more than one CQE.
27 /* executed by io-wq */
135 * ring_entries - 1)
208 /* inline/task_work completion list, under ->uring_lock */
230 /* const or read-mostly hot data */
285 * ->iopoll_list is protected by the ctx->uring_lock for
299 * Modifications are protected by ->uring_lock and ->mmap_lock.
313 * ->uring_cmd() by io_uring_cmd_insert_cancelable()
405 /* io-wq management, e.g. thread count */
426 /* protected by ->completion_lock */
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/linux-6.14.4/drivers/scsi/elx/efct/
Defct_hw.c1 // SPDX-License-Identifier: GPL-2.0
36 hw->link.status = SLI4_LINK_STATUS_MAX; in efct_hw_link_event_init()
37 hw->link.topology = SLI4_LINK_TOPO_NONE; in efct_hw_link_event_init()
38 hw->link.medium = SLI4_LINK_MEDIUM_MAX; in efct_hw_link_event_init()
39 hw->link.speed = 0; in efct_hw_link_event_init()
40 hw->link.loop_map = NULL; in efct_hw_link_event_init()
41 hw->link.fc_id = U32_MAX; in efct_hw_link_event_init()
50 struct efct *efct = hw->os; in efct_hw_read_max_dump_size()
55 if (PCI_FUNC(efct->pci->devfn) != 0) in efct_hw_read_max_dump_size()
58 if (sli_cmd_common_set_dump_location(&hw->sli, buf, 1, 0, NULL, 0)) in efct_hw_read_max_dump_size()
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/linux-6.14.4/tools/net/ynl/pyynl/
Dethtool.py2 # SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
18 Verify and convert command-line arguments to the ynl-compatible request.
21 valid_attrs.remove('header') # not user-provided
45 Pretty-print a set of fields from the reply. desc specifies the
70 Print out the speed-like strings from the value dict.
72 speed_re = re.compile(r'[0-9]+base[^/]+/.+')
82 'dev-name': args.device,
99 if msg['header']['dev-name'] == args.device:
111 Convert ynl-formatted bitmask to a dict of bit=value.
128 parser.add_argument('--json', action=argparse.BooleanOptionalAction)
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/linux-6.14.4/drivers/scsi/qedf/
Dqedf_main.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2016-2018 Cavium Inc.
59 static int qedf_default_prio = -1;
82 "supports. (default 0xffffffff)");
107 "during probe (0-3: 0 more verbose).");
126 vlan_id_tmp = vlan_id | (qedf->prio << VLAN_PRIO_SHIFT); in qedf_set_vlan_id()
127 qedf->vlan_id = vlan_id_tmp; in qedf_set_vlan_id()
128 QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_DISC, in qedf_set_vlan_id()
130 vlan_id_tmp, qedf->prio); in qedf_set_vlan_id()
137 while (qedf->fipvlan_retries--) { in qedf_initiate_fipvlan_req()
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/linux-6.14.4/arch/arm64/boot/dts/mediatek/
Dmt8188-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
11 compatible = "mediatek,mt8188-evb", "mediatek,mt8188";
26 stdout-path = "serial0:115200n8";
34 reserved_memory: reserved-memory {
35 #address-cells = <2>;
36 #size-cells = <2>;
40 compatible = "shared-dma-pool";
42 no-map;
52 pinctrl-names = "default";
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