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Searched +full:stm32h743 +full:- +full:rcc (Results 1 – 6 of 6) sorted by relevance

/linux-6.14.4/Documentation/devicetree/bindings/clock/
Dst,stm32-rcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/st,stm32-rcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dario Binacchi <[email protected]>
13 The RCC IP is both a reset and a clock controller.
14 The reset phandle argument is the bit number within the RCC registers bank,
15 starting from RCC base address.
20 - items:
21 - enum:
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Dst,stm32h7-rcc.txt4 The RCC IP is both a reset and a clock controller.
6 Please refer to clock-bindings.txt for common clock controller binding usage.
10 - compatible: Should be:
11 "st,stm32h743-rcc"
13 - reg: should be register base and length as documented in the
16 - #reset-cells: 1, see below
18 - #clock-cells : from common clock binding; shall be set to 1
20 - clocks: External oscillator clock phandle
21 - high speed external clock signal (HSE)
22 - low speed external clock signal (LSE)
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/linux-6.14.4/arch/arm/boot/dts/st/
Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <[email protected]>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
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Dstm32h743i-eval.dts2 * Copyright 2017 - Alexandre Torgue <[email protected]>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
44 #include "stm32h743.dtsi"
45 #include "stm32h7-pinctrl.dtsi"
48 model = "STMicroelectronics STM32H743i-EVAL board";
49 compatible = "st,stm32h743i-eval", "st,stm32h743";
53 stdout-path = "serial0:115200n8";
65 vdda: regulator-vdda {
66 compatible = "regulator-fixed";
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/linux-6.14.4/Documentation/devicetree/bindings/pinctrl/
Dst,stm32-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre TORGUE <[email protected]>
17 on-chip controllers onto these pads.
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
24 - st,stm32f746-pinctrl
25 - st,stm32f769-pinctrl
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/linux-6.14.4/drivers/clk/
Dclk-stm32h7.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
18 #include <dt-bindings/clock/stm32h7-clks.h>
139 /* Micro-controller output clock parent */
178 bit_status = !(readl(gate->reg) & BIT(rgate->bit_rdy)); in ready_gate_clk_enable()
183 } while (bit_status && --timeout); in ready_gate_clk_enable()
201 bit_status = !!(readl(gate->reg) & BIT(rgate->bit_rdy)); in ready_gate_clk_disable()
206 } while (bit_status && --timeout); in ready_gate_clk_disable()
227 return ERR_PTR(-ENOMEM); in clk_register_ready_gate()
235 rgate->bit_rdy = bit_rdy; in clk_register_ready_gate()
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