Searched +full:stm32 +full:- +full:hwspinlock (Results 1 – 7 of 7) sorted by relevance
/linux-6.14.4/Documentation/devicetree/bindings/hwlock/ |
D | st,stm32-hwspinlock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/hwlock/st,stm32-hwspinlock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 Hardware Spinlock 10 - Fabien Dessenne <[email protected]> 13 "#hwlock-cells": 17 const: st,stm32-hwspinlock 25 clock-names: 27 - const: hsem [all …]
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/linux-6.14.4/drivers/hwspinlock/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 3 # Generic HWSPINLOCK framework 6 menuconfig HWSPINLOCK config 9 if HWSPINLOCK 40 tristate "STM32 Hardware Spinlock device" 43 Say y here to support the STM32 Hardware Spinlock device. 66 endif # HWSPINLOCK
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D | stm32_hwspinlock.c | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <linux/hwspinlock.h> 28 static int stm32_hwspinlock_trylock(struct hwspinlock *lock) in stm32_hwspinlock_trylock() 30 void __iomem *lock_addr = lock->priv; in stm32_hwspinlock_trylock() 39 static void stm32_hwspinlock_unlock(struct hwspinlock *lock) in stm32_hwspinlock_unlock() 41 void __iomem *lock_addr = lock->priv; in stm32_hwspinlock_unlock() 46 static void stm32_hwspinlock_relax(struct hwspinlock *lock) in stm32_hwspinlock_relax() 61 struct device *dev = &pdev->dev; in stm32_hwspinlock_disable_clk() 68 clk_disable_unprepare(hw->clk); in stm32_hwspinlock_disable_clk() 73 struct device *dev = &pdev->dev; in stm32_hwspinlock_probe() [all …]
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/linux-6.14.4/drivers/irqchip/ |
D | irq-stm32mp-exti.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Copyright (C) STMicroelectronics 2017-2024 5 * Author: Maxime Coquelin <mcoquelin.stm32@gmail.com> 9 #include <linux/hwspinlock.h> 22 #include <dt-bindings/interrupt-controller/arm-gic.h> 74 struct hwspinlock *hwlock; 131 __diag_ignore_all("-Woverride-init", 136 [0 ... (STM32MP_DESC_IRQ_SIZE - 1)] = EXTI_INVALID_IRQ, 185 [0 ... (STM32MP_DESC_IRQ_SIZE - 1)] = EXTI_INVALID_IRQ, 244 u32 mask = BIT(d->hwirq % IRQS_PER_BANK); in stm32mp_exti_convert_type() [all …]
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/linux-6.14.4/drivers/pinctrl/stm32/ |
D | pinctrl-stm32.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Author: Maxime Coquelin <mcoquelin.stm32@gmail.com> 11 #include <linux/hwspinlock.h> 29 #include <linux/pinctrl/pinconf-generic.h> 36 #include "../pinctrl-utils.h" 37 #include "pinctrl-stm32.h" 117 struct hwspinlock *hwlock; 150 return function - 1; in stm32_gpio_get_alt() 161 bank->pin_backup[offset] &= ~BIT(STM32_GPIO_BKP_VAL); in stm32_gpio_backup_value() 162 bank->pin_backup[offset] |= value << STM32_GPIO_BKP_VAL; in stm32_gpio_backup_value() [all …]
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/linux-6.14.4/drivers/spi/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 13 dynamic device discovery; some are even write-only or read-only. 17 chips, analog to digital (and d-to-a) converters, and more. 44 If your system has an master-capable SPI controller (which 56 by providing a high-level interface to send memory-like commands. 66 This enables support for SPI-NAND mode on the Airoha NAND 68 is implemented as a SPI-MEM controller. 107 to a single device like spi-nor (nvram), input device controller 166 supports spi-mem interface. 245 this code to manage the per-word or per-transfer accesses to the [all …]
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/linux-6.14.4/ |
D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-[email protected] 88 F: drivers/scsi/3w-* [all …]
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