Home
last modified time | relevance | path

Searched +full:rx +full:- +full:shared (Results 1 – 25 of 885) sorted by relevance

12345678910>>...36

/linux-6.14.4/arch/arm64/boot/dts/ti/
Dk3-am68-sk-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include "k3-j721s2.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
14 bootph-all;
20 reserved_memory: reserved-memory {
21 #address-cells = <2>;
22 #size-cells = <2>;
27 no-map;
[all …]
Dk3-am642-tqma64xxl.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
4 * Copyright (c) 2022-2024 TQ-Systems GmbH <[email protected]-group.com>, D-82229 Seefeld, Germany.
7 #include "k3-am642.dtsi"
18 /* 1G RAM - default variant */
23 reserved-memory {
24 #address-cells = <2>;
25 #size-cells = <2>;
31 no-map;
34 main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
[all …]
Dk3-j721e-som-p0.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2019-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721e.dtsi"
15 bootph-all;
21 reserved_memory: reserved-memory {
22 #address-cells = <2>;
23 #size-cells = <2>;
29 no-map;
32 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
[all …]
Dk3-j721s2-som-p0.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721s2.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
16 bootph-all;
23 reserved_memory: reserved-memory {
24 #address-cells = <2>;
25 #size-cells = <2>;
31 no-map;
[all …]
Dk3-am64-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021-2024 PHYTEC America, LLC - https://www.phytec.com
6 * Copyright (C) 2022-2024 PHYTEC Messtechnik GmbH
10 * https://www.phytec.com/product/phycore-am64x
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/net/ti-dp83867.h>
18 model = "PHYTEC phyCORE-AM64x";
19 compatible = "phytec,am64-phycore-som", "ti,am642";
32 reserved_memory: reserved-memory {
[all …]
Dk3-j784s4-j742s2-evm-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
10 stdout-path = "serial2:115200n8";
25 reserved_memory: reserved-memory {
26 #address-cells = <2>;
27 #size-cells = <2>;
32 no-map;
35 mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
36 compatible = "shared-dma-pool";
38 no-map;
[all …]
Dk3-j721e-beagleboneai64.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * https://beagleboard.org/ai-64
4 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
5 * Copyright (C) 2022-2024 Jason Kridner, BeagleBoard.org Foundation
6 * Copyright (C) 2022-2024 Robert Nelson, BeagleBoard.org Foundation
9 /dts-v1/;
11 #include "k3-j721e.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/leds/common.h>
[all …]
Dk3-am69-sk.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
9 /dts-v1/;
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include "k3-j784s4.dtsi"
16 compatible = "ti,am69-sk", "ti,j784s4";
20 stdout-path = "serial2:115200n8";
36 bootph-all;
42 reserved_memory: reserved-memory {
[all …]
Dk3-am67a-beagley-ai.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * https://beagley-ai.org/
5 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
9 /dts-v1/;
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include "k3-j722s.dtsi"
16 compatible = "beagle,am67a-beagley-ai", "ti,j722s";
17 model = "BeagleBoard.org BeagleY-AI";
27 stdout-path = &main_uart0;
[all …]
Dk3-am642-sk.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include <dt-bindings/phy/phy.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/leds/common.h>
12 #include "k3-am642.dtsi"
14 #include "k3-serdes.h"
17 compatible = "ti,am642-sk", "ti,am642";
[all …]
Dk3-j721e-sk.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
5 * J721E SK URL: https://www.ti.com/tool/SK-TDA4VM
8 /dts-v1/;
10 #include "k3-j721e.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/net/ti-dp83867.h>
16 compatible = "ti,j721e-sk", "ti,j721e";
29 stdout-path = "serial2:115200n8";
[all …]
Dk3-j7200-som-p0.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
10 #include "k3-j7200.dtsi"
15 bootph-all;
21 reserved_memory: reserved-memory {
22 #address-cells = <2>;
23 #size-cells = <2>;
29 no-map;
[all …]
Dk3-j722s-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
4 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
9 /dts-v1/;
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy.h>
13 #include "k3-j722s.dtsi"
14 #include "k3-serdes.h"
17 compatible = "ti,j722s-evm", "ti,j722s";
29 stdout-path = &main_uart0;
37 bootph-pre-ram;
[all …]
/linux-6.14.4/drivers/net/wireless/ralink/rt2x00/
Drt2500usb.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2009 Ivo van Doorn <[email protected]>
36 * Default offset is required for RSSI <-> dBm conversion.
238 * ACK_TIMEOUT: ACK Timeout in unit of 1-us.
248 * TXRX_CSR2: RX control.
249 * DISABLE_RX: Disable rx engine.
271 * RX BBP ID registers
272 * TXRX_CSR3: CCK RX BBP ID.
273 * TXRX_CSR4: OFDM RX BBP ID.
315 * TXRX_CSR9: TX ACK time-out.
[all …]
Drt73usb.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2009 Ivo van Doorn <[email protected]>
27 * Default offset is required for RSSI <-> dBm conversion.
76 * 16 entries 32-byte for shared key table
77 * 64 entries 32-byte for pairwise key table
78 * 64 entries 8-byte for pairwise ta key table
113 * On-chip BEACON frame space.
159 * to determine the UNICAST_TO_ME bit for RX frames.
182 * when determining the MY_BSS of RX frames.
183 * 0: 1-BSSID mode (BSS index = 0)
[all …]
Drt61pci.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 Copyright (C) 2004 - 2009 Ivo van Doorn <[email protected]>
34 * Default offset is required for RSSI <-> dBm conversion.
121 * 16 entries 32-byte for shared key table
122 * 64 entries 32-byte for pairwise key table
123 * 64 entries 8-byte for pairwise ta key table
152 * Other on-chip shared memory space.
164 * On-chip BEACON frame space.
175 * HOST-MCU shared memory.
179 * H2M_MAILBOX_CSR: Host-to-MCU Mailbox.
[all …]
/linux-6.14.4/drivers/firmware/arm_scmi/
Dshmem.c1 // SPDX-License-Identifier: GPL-2.0
3 * For transport using shared mem structure.
5 * Copyright (C) 2019-2024 ARM Ltd.
67 * pre-processor.
98 * until it releases the shared memory, otherwise we may endup in shmem_tx_prepare()
99 * overwriting its response with new message payload or vice-versa. in shmem_tx_prepare()
101 * not to bail-out on intermittent issues where the platform is in shmem_tx_prepare()
104 * Note that after a timeout is detected we bail-out and carry on but in shmem_tx_prepare()
109 stop = ktime_add_ms(ktime_get(), 2 * cinfo->rx_timeout_ms); in shmem_tx_prepare()
110 spin_until_cond((ioread32(&shmem->channel_status) & in shmem_tx_prepare()
[all …]
/linux-6.14.4/Documentation/virt/kvm/
Dppc-pv.rst1 .. SPDX-License-Identifier: GPL-2.0
35 'hypercall-instructions'. This property contains at most 4 opcodes that make
43 r0 - volatile
53 r12 - volatile
56 Hypercall definitions are shared in generic code, so the same hypercall numbers
73 To enable communication between the hypervisor and guest there is a new shared
75 map this shared page using the KVM hypercall KVM_HC_PPC_MAP_MAGIC_PAGE.
80 applicable to the target. For now, we always map the page to -4096. This way we
84 ld rX, -4096(0)
133 - MSR_EE
[all …]
/linux-6.14.4/drivers/net/vmxnet3/
Dvmxnet3_ethtool.c4 * Copyright (C) 2008-2024, VMware, Inc. All Rights Reserved.
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
23 * Maintained by: pv-[email protected]
89 { "Rx Queue#", 0 },
90 { " LRO pkts rx", offsetof(struct UPT1_RxStats, LROPktsRxOK) },
91 { " LRO byte rx", offsetof(struct UPT1_RxStats, LROBytesRxOK) },
92 { " ucast pkts rx", offsetof(struct UPT1_RxStats, ucastPktsRxOK) },
93 { " ucast bytes rx", offsetof(struct UPT1_RxStats, ucastBytesRxOK) },
94 { " mcast pkts rx", offsetof(struct UPT1_RxStats, mcastPktsRxOK) },
95 { " mcast bytes rx", offsetof(struct UPT1_RxStats, mcastBytesRxOK) },
[all …]
Dvmxnet3_drv.c4 * Copyright (C) 2008-2024, VMware, Inc. All Rights Reserved.
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
23 * Maintained by: pv-[email protected]
77 for (i = 0; i < adapter->intr.num_intrs; i++) in vmxnet3_enable_all_intrs()
80 !adapter->queuesExtEnabled) { in vmxnet3_enable_all_intrs()
81 adapter->shared->devRead.intrConf.intrCtrl &= in vmxnet3_enable_all_intrs()
84 adapter->shared->devReadExt.intrConfExt.intrCtrl &= in vmxnet3_enable_all_intrs()
96 !adapter->queuesExtEnabled) { in vmxnet3_disable_all_intrs()
97 adapter->shared->devRead.intrConf.intrCtrl |= in vmxnet3_disable_all_intrs()
100 adapter->shared->devReadExt.intrConfExt.intrCtrl |= in vmxnet3_disable_all_intrs()
[all …]
/linux-6.14.4/Documentation/networking/device_drivers/ethernet/intel/
Dice.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 2018-2021 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Important Notes
16 - Additional Features & Configurations
17 - Performance Optimization
28 This driver supports XDP (Express Data Path) and AF_XDP zero-copy. Note that
43 -------------------------------------------
54 1) Make sure that your system's physical memory is in a high-performance
[all …]
/linux-6.14.4/Documentation/networking/
Dpktgen.rst1 .. SPDX-License-Identifier: GPL-2.0
7 Enable CONFIG_NET_PKTGEN to compile and build pktgen either in-kernel
31 overload type of benchmarking, as this could hurt the normal use-case.
35 # ethtool -G ethX tx 1024
44 ring-buffers for various performance reasons, and packets stalling
48 (Intel 82599 chip). This driver (ixgbe) combines TX+RX ring cleanups,
49 and the cleanup interval is affected by the ethtool --coalesce setting
50 of parameter "rx-usecs".
54 # ethtool -C ethX rx-usecs 30
72 * add_device DEVICE@NAME -- adds a single device
[all …]
/linux-6.14.4/Documentation/devicetree/bindings/sound/
Dfsl,sai.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <[email protected]>
21 - items:
22 - enum:
23 - fsl,imx6ul-sai
24 - fsl,imx7d-sai
25 - const: fsl,imx6sx-sai
27 - items:
[all …]
/linux-6.14.4/drivers/net/ethernet/dec/tulip/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 bool "DEC - Tulip devices"
70 bool "Use PCI shared mem for NIC registers"
73 Use PCI shared memory for the NIC registers, rather than going through
79 bool "Use RX polling (NAPI)"
86 If your estimated Rx load is 10kpps or more, or if the card will be
96 Use HW to reduce RX interrupts. Not strictly necessary since NAPI
97 reduces RX interrupts by itself. Interrupt mitigation reduces RX
114 the TX9882 chip on the Compex RL100-ATX board.
147 It should work with most DEC 21*4*-based chips/ethercards, as well
[all …]
/linux-6.14.4/drivers/net/ethernet/intel/e1000/
De1000_hw.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2006 Intel Corporation. */
5 * Shared functions for accessing and configuring the MAC
89 * e1000_set_phy_type - Set the phy type member in the hw struct.
90 * @hw: Struct containing variables accessed by shared code
94 if (hw->mac_type == e1000_undefined) in e1000_set_phy_type()
95 return -E1000_ERR_PHY_TYPE; in e1000_set_phy_type()
97 switch (hw->phy_id) { in e1000_set_phy_type()
103 hw->phy_type = e1000_phy_m88; in e1000_set_phy_type()
106 if (hw->mac_type == e1000_82541 || in e1000_set_phy_type()
[all …]

12345678910>>...36