Searched +full:riscv +full:- +full:zicond (Results 1 – 5 of 5) sorted by relevance
/linux-6.14.4/arch/riscv/boot/dts/spacemit/ |
D | k1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 6 /dts-v1/; 8 #address-cells = <2>; 9 #size-cells = <2>; 14 #address-cells = <1>; 15 #size-cells = <0>; 16 timebase-frequency = <24000000>; 18 cpu-map { 51 compatible = "spacemit,x60", "riscv"; 54 …riscv,isa = "rv64imafdcv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_z… [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/riscv/ |
D | extensions.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 --- 4 $id: http://devicetree.org/schemas/riscv/extensions.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: RISC-V ISA extensions 10 - Paul Walmsley <[email protected]> 11 - Palmer Dabbelt <[email protected]> 12 - Conor Dooley <[email protected]> 15 RISC-V has a large number of extensions, some of which are "standard" 16 extensions, meaning they are ratified by RISC-V International, and others [all …]
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/linux-6.14.4/Documentation/arch/riscv/ |
D | hwprobe.rst | 1 .. SPDX-License-Identifier: GPL-2.0 3 RISC-V Hardware Probing Interface 4 --------------------------------- 6 The RISC-V hardware probing interface is based around a single syscall, which 18 The arguments are split into three groups: an array of key-value pairs, a CPU 19 set, and some flags. The key-value pairs are supplied with a count. Userspace 22 will be cleared to -1, and its value set to 0. The CPU set is defined by 23 CPU_SET(3) with size ``cpusetsize`` bytes. For value-like keys (eg. vendor, 25 have the same value. Otherwise -1 will be returned. For boolean-like keys, the 33 by sys_riscv_hwprobe() to only those which match each of the key-value pairs. [all …]
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/linux-6.14.4/arch/riscv/kernel/ |
D | cpufeature.c | 1 // SPDX-License-Identifier: GPL-2.0-only 24 #include <asm/text-patching.h> 32 #define NUM_ALPHA_EXTS ('z' - 'a' + 1) 41 /* Per-cpu ISA extensions. */ 47 * riscv_isa_extension_base() - Get base extension word 63 * __riscv_isa_extension_available() - Check whether given extension 87 pr_err("Zicbom detected in ISA string, disabling as no cbom-block-size found\n"); in riscv_ext_zicbom_validate() 88 return -EINVAL; in riscv_ext_zicbom_validate() 91 pr_err("Zicbom disabled as cbom-block-size present, but is not a power-of-2\n"); in riscv_ext_zicbom_validate() 92 return -EINVAL; in riscv_ext_zicbom_validate() [all …]
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D | sys_hwprobe.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * are supported by the hardware. See Documentation/arch/riscv/hwprobe.rst for 25 u64 id = -1ULL; in hwprobe_arch_id() 32 switch (pair->key) { in hwprobe_arch_id() 50 * If there's a mismatch for the given set, return -1 in the in hwprobe_arch_id() 54 id = -1ULL; in hwprobe_arch_id() 59 pair->value = id; in hwprobe_arch_id() 68 pair->value = 0; in hwprobe_isa_ext0() 70 pair->value |= RISCV_HWPROBE_IMA_FD; in hwprobe_isa_ext0() 73 pair->value |= RISCV_HWPROBE_IMA_C; in hwprobe_isa_ext0() [all …]
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