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/linux-6.14.4/Documentation/devicetree/bindings/net/
Dcpsw.txt2 ------------------------------------------------------
5 - compatible : Should be one of the below:-
7 "ti,am335x-cpsw" for AM335x controllers
8 "ti,am4372-cpsw" for AM437x controllers
9 "ti,dra7-cpsw" for DRA7x controllers
10 - reg : physical base address and size of the cpsw
12 - interrupts : property with a value describing the interrupt
14 - cpdma_channels : Specifies number of channels in CPDMA
15 - ale_entries : Specifies No of entries ALE can hold
16 - bd_ram_size : Specifies internal descriptor RAM size
[all …]
Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <[email protected]>
19 local-mac-address:
22 $ref: /schemas/types.yaml#/definitions/uint8-array
26 mac-address:
31 local-mac-address property.
32 $ref: /schemas/types.yaml#/definitions/uint8-array
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Dadi,adin.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandru Tachici <[email protected]>
16 - $ref: ethernet-phy.yaml#
19 adi,rx-internal-delay-ps:
21 RGMII RX Clock Delay used only when PHY operates in RGMII mode with
22 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
26 adi,tx-internal-delay-ps:
28 RGMII TX Clock Delay used only when PHY operates in RGMII mode with
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Damlogic,meson-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/amlogic,meson-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <[email protected]>
12 - Martin Blumenstingl <[email protected]>
20 - amlogic,meson6-dwmac
21 - amlogic,meson8b-dwmac
22 - amlogic,meson8m2-dwmac
23 - amlogic,meson-gxbb-dwmac
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Dmotorcomm,yt8xxx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Sae <frank.sae@motor-comm.com>
13 - $ref: ethernet-phy.yaml#
18 - ethernet-phy-id4f51.e91a
19 - ethernet-phy-id4f51.e91b
21 rx-internal-delay-ps:
23 RGMII RX Clock Delay used only when PHY operates in RGMII mode with
24 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
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/linux-6.14.4/Documentation/ABI/testing/
Dsysfs-class-net-phydev24 This attribute contains the 32-bit PHY Identifier as reported
41 <empty> (not available), mii, gmii, sgmii, tbi, rev-mii,
42 rmii, rgmii, rgmii-id, rgmii-rxid, rgmii-txid, rtbi, smii
43 xgmii, moca, qsgmii, trgmii, 1000base-x, 2500base-x, rxaui,
44 xaui, 10gbase-kr, unknown
60 32-bit hexadecimal number representing a bit mask of the
/linux-6.14.4/Documentation/devicetree/bindings/net/dsa/
Dbrcm,b53.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Florian Fainelli <[email protected]>
18 - const: brcm,bcm5325
19 - const: brcm,bcm53115
20 - const: brcm,bcm53125
21 - const: brcm,bcm53128
22 - const: brcm,bcm53134
23 - const: brcm,bcm5365
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Dmicrochip,lan937x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - [email protected]
13 - $ref: dsa.yaml#/$defs/ethernet-ports
18 - microchip,lan9370
19 - microchip,lan9371
20 - microchip,lan9372
21 - microchip,lan9373
22 - microchip,lan9374
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Dnxp,sja1105.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The SJA1105 SPI interface requires a CS-to-CLK time (t2 in UM10944.pdf) of at
16 - Vladimir Oltean <[email protected]>
21 - nxp,sja1105e
22 - nxp,sja1105t
23 - nxp,sja1105p
24 - nxp,sja1105q
25 - nxp,sja1105r
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Dmediatek,mt7530.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <[email protected]>
11 - Landen Chao <[email protected]>
12 - DENG Qingfang <[email protected]>
13 - Sean Wang <[email protected]>
14 - Daniel Golle <[email protected]>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
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/linux-6.14.4/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/
Ducc.txt4 - device_type : should be "network", "hldc", "uart", "transparent"
6 - compatible : could be "ucc_geth" or "fsl_atm" and so on.
7 - cell-index : the ucc number(1-8), corresponding to UCCx in UM.
8 - reg : Offset and length of the register set for the device
9 - interrupts : <a b> where a is the interrupt number and b is a
14 - pio-handle : The phandle for the Parallel I/O port configuration.
15 - port-number : for UART drivers, the port number to use, between 0 and 3.
18 CPM UART driver, the port-number is required for the QE UART driver.
19 - soft-uart : for UART drivers, if specified this means the QE UART device
20 driver should use "Soft-UART" mode, which is needed on some SOCs that have
[all …]
/linux-6.14.4/arch/arm/boot/dts/marvell/
Dkirkwood-l-50.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Check Point L-50 Board Description
7 /dts-v1/;
10 #include "kirkwood-6281.dtsi"
13 model = "Check Point L-50";
14 compatible = "checkpoint,l-50", "marvell,kirkwood-88f6281", "marvell,kirkwood";
23 stdout-path = &uart0;
27 pinctrl: pin-controller@10000 {
28 pinctrl-0 = <&pmx_led38 &pmx_sysrst &pmx_button29>;
29 pinctrl-names = "default";
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/linux-6.14.4/arch/arm64/boot/dts/allwinner/
Dsun50i-a64-pine64-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include "sun50i-a64-pine64.dts"
8 compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
14 pinctrl-names = "default";
15 pinctrl-0 = <&rgmii_pins>;
16 phy-mode = "rgmii-txid";
17 phy-handle = <&ext_rgmii_phy>;
22 ext_rgmii_phy: ethernet-phy@1 {
23 compatible = "ethernet-phy-ieee802.3-c22";
34 regulator-enable-ramp-delay = <100000>;
Dsun50i-a64-sopine-baseboard.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 // Based on sun50i-a64-pine64.dts, which is:
6 /dts-v1/;
8 #include "sun50i-a64-sopine.dtsi"
12 compatible = "pine64,sopine-baseboard", "pine64,sopine",
13 "allwinner,sun50i-a64";
25 stdout-path = "serial0:115200n8";
28 hdmi-connector {
29 compatible = "hdmi-connector";
34 remote-endpoint = <&hdmi_out_con>;
[all …]
/linux-6.14.4/drivers/net/ethernet/microchip/sparx5/lan969x/
Dlan969x_rgmii.c1 // SPDX-License-Identifier: GPL-2.0+
27 #define LAN969X_RGMII_PORT_START_IDX 28 /* Index of the first RGMII port */
32 #define RGMII_PORT_IDX(port) ((port)->portno - LAN969X_RGMII_PORT_START_IDX)
78 dev_err(port->sparx5->dev, "Invalid RGMII delay: %u", delay_ps); in lan969x_rgmii_get_clk_delay_sel()
79 return -EINVAL; in lan969x_rgmii_get_clk_delay_sel()
85 /* Configure the RGMII tx clock frequency. */
89 u32 clk_sel = lan969x_rgmii_get_clk_sel(conf->speed); in lan969x_rgmii_tx_clk_config()
92 /* Take the RGMII clock domain out of reset and set tx clock in lan969x_rgmii_tx_clk_config()
101 port->sparx5, HSIO_WRAP_RGMII_CFG(idx)); in lan969x_rgmii_tx_clk_config()
104 /* Configure the RGMII port device. */
[all …]
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dsa8540p-ride.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sa8540p-pmics.dtsi"
17 compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
29 stdout-path = "serial0:115200n8";
34 regulators-0 {
35 compatible = "qcom,pm8150-rpmh-regulators";
36 qcom,pmic-id = "a";
[all …]
/linux-6.14.4/arch/arm64/boot/dts/amlogic/
Dmeson-gxl-s905d-vero4k-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxl-s905d.dtsi"
9 #include "meson-gx-p23x-q20x.dtsi"
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
14 compatible = "osmc,vero4k-plus", "amlogic,s905d", "amlogic,meson-gxl";
17 gpio-keys-polled {
18 compatible = "gpio-keys-polled";
19 poll-interval = <20>;
[all …]
Dmeson-sm1-x96-air-gbit.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "meson-sm1-ac2xx.dtsi"
10 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
13 compatible = "amediatech,x96-air-gbit", "amlogic,sm1";
17 compatible = "amlogic,axg-sound-card";
18 model = "X96-AIR";
19 audio-aux-devs = <&tdmout_b>;
20 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
29 assigned-clocks = <&clkc CLKID_MPLL2>,
[all …]
Dmeson-sm1-a95xf3-air-gbit.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "meson-sm1-ac2xx.dtsi"
10 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
13 compatible = "cyx,a95xf3-air-gbit", "amlogic,sm1";
14 model = "Shenzhen CYX Industrial Co., Ltd A95XF3-AIR";
17 compatible = "amlogic,axg-sound-card";
18 model = "A95XF3-AIR";
19 audio-aux-devs = <&tdmout_b>;
20 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
[all …]
Dmeson-sm1-h96-max.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "meson-sm1-ac2xx.dtsi"
10 #include <dt-bindings/sound/meson-g12a-tohdmitx.h>
13 compatible = "haochuangyi,h96-max", "amlogic,sm1";
17 compatible = "amlogic,axg-sound-card";
18 model = "H96-MAX";
19 audio-aux-devs = <&tdmout_b>;
20 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
29 assigned-clocks = <&clkc CLKID_MPLL2>,
[all …]
/linux-6.14.4/arch/arm/boot/dts/nxp/vf/
Dvf610-zii-dev-rev-b.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "vf610-zii-dev.dtsi"
11 compatible = "zii,vf610dev-b", "zii,vf610dev", "fsl,vf610";
13 mdio-mux {
14 compatible = "mdio-mux-gpio";
15 pinctrl-0 = <&pinctrl_mdio_mux>;
16 pinctrl-names = "default";
21 mdio-parent-bus = <&mdio1>;
22 #address-cells = <1>;
[all …]
/linux-6.14.4/arch/arm/boot/dts/microchip/
Dat91-sama5d3_ksz9477_evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
5 /dts-v1/;
9 model = "EVB-KSZ9477";
10 compatible = "microchip,sama5d3-ksz9477-evb", "atmel,sama5d36",
14 stdout-path = &dbgu;
17 reg_3v3: regulator-3v3 {
18 compatible = "regulator-fixed";
19 regulator-name = "3v3";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
[all …]
/linux-6.14.4/arch/arm/boot/dts/ti/omap/
Dam437x-cm-t43.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 CompuLab, Ltd. - https://www.compulab.co.il/
6 /dts-v1/;
8 #include <dt-bindings/pinctrl/am43xx.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 model = "CompuLab CM-T43";
15 compatible = "compulab,am437x-cm-t43", "ti,am4372", "ti,am43";
18 compatible = "gpio-leds";
21 label = "cm-t43:green";
[all …]
Dam57xx-cl-som-am57x.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Support for CompuLab CL-SOM-AM57x System-on-Module
5 * Copyright (C) 2015 CompuLab Ltd. - https://www.compulab.co.il/
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
16 model = "CompuLab CL-SOM-AM57x";
17 compatible = "compulab,cl-som-am57x", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
21 reg = <0x0 0x80000000 0x0 0x20000000>; /* 512 MB - minimal configuration */
25 compatible = "gpio-leds";
[all …]
/linux-6.14.4/arch/arm/boot/dts/allwinner/
Dsun7i-a20-lamobo-r1.dts4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
44 #include "sun7i-a20.dtsi"
45 #include "sunxi-common-regulators.dtsi"
47 #include <dt-bindings/gpio/gpio.h>
48 #include <dt-bindings/interrupt-controller/irq.h>
52 compatible = "lamobo,lamobo-r1", "allwinner,sun7i-a20";
61 stdout-path = "serial0:115200n8";
64 hdmi-connector {
65 compatible = "hdmi-connector";
[all …]

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