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/linux-6.14.4/Documentation/devicetree/bindings/watchdog/
Daspeed,ast2400-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/aspeed,ast2400-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <[email protected]>
15 - aspeed,ast2400-wdt
16 - aspeed,ast2500-wdt
17 - aspeed,ast2600-wdt
29 aspeed,reset-type:
32 - cpu
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Dcdns,wdt-r1p2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/cdns,wdt-r1p2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Neeli Srinivas <[email protected]>
15 a programmable reset period. The timeout period varies from 1 ms
19 - $ref: watchdog.yaml#
24 - cdns,wdt-r1p2
35 reset-on-timeout:
38 If this property exists, then a reset is done when watchdog
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/linux-6.14.4/drivers/gpu/drm/i915/
DKconfig.profile2 int "Default timeout for requests (ms)"
5 Configures the default timeout after which any user submissions will
13 May be 0 to disable the timeout.
16 int "Timeout for unsignaled foreign fences (ms, jiffy granularity)"
21 make forward progress. This value specifies the timeout used for an
24 May be 0 to disable the timeout, and rely on the foreign fence being
31 On runtime suspend, as we suspend the device, we have to revoke
32 userspace GGTT mmaps and force userspace to take a pagefault on
35 that complements the runtime-pm autosuspend and provides a lower
36 floor on the autosuspend delay.
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/linux-6.14.4/Documentation/watchdog/
Dmlx-wdt.rst16 Actual HW timeout can be defined as a power of 2 msec.
17 e.g. timeout 20 sec will be rounded up to 32768 msec.
18 The maximum timeout period is 32 sec (32768 msec.),
19 Get time-left isn't supported
22 Actual HW timeout is defined in sec. and it's the same as
23 a user-defined timeout.
24 Maximum timeout is 255 sec.
25 Get time-left is supported.
28 Same as Type 2 with extended maximum timeout period.
29 Maximum timeout is 65535 sec.
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Dwatchdog-api.rst9 Copyright 2002 Christer Weingel <wingel@nano-system.com>
19 A Watchdog Timer (WDT) is a hardware circuit that can reset the
27 that the watchdog should wait for yet another little while to reset
29 notifications cease to occur, and the hardware watchdog will reset the
30 system (causing a reboot) after the timeout occurs.
32 The Linux watchdog API is a rather ad-hoc construction and different
43 timeout or margin. The simplest way to ping the watchdog is to write
45 like this source file: see samples/watchdog/watchdog-simple.c
54 drivers support the configuration option "Disable watchdog shutdown on
58 after the timeout has passed. Watchdog devices also usually support
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/linux-6.14.4/drivers/watchdog/
Dcadence_wdt.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Cadence WDT driver - Used by Xilinx Zynq
5 * Copyright (C) 2010 - 2014 Xilinx, Inc.
21 /* Supports 1 - 516 sec */
63 * struct cdns_wdt - Watchdog device structure
65 * @rst: reset flag
87 writel_relaxed(val, wdt->regs + offset); in cdns_wdt_writereg()
99 * Zero Mode Register - This register controls how the time out is indicated
103 #define CDNS_WDT_ZMR_RSTEN_MASK 0x00000002 /* Enable the reset output */
105 #define CDNS_WDT_ZMR_RSTLEN_16 0x00000030 /* Reset pulse of 16 pclk cycles */
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Dsb_wdog.c7 * on the Sibyte 12XX and 11XX SoCs available to the user. There are two
8 * such devices available on the SoC, but it seems that there isn't an
13 * I have not tried this driver on a 1480 processor; it might work
18 * is reset and there is no way to redirect that NMI. Which could
19 * be problematic in some cases where this chip is sitting on the HT
21 * Since the reset can't be redirected to the external reset pin, it is
22 * possible that other HT connected processors might hang and not reset.
23 * For Linux, a soft reset would probably be even worse than a hard reset.
35 * Based on various other watchdog drivers, which are probably all
36 * loosely based on something Alan Cox wrote years ago.
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Dsmsc37b787_wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Based on acquirewdt.c by Alan Cox <[email protected]>
9 * any of this software. This material is provided "AS-IS" in
12 * (C) Copyright 2003-2006 Sven Anders <[email protected]>
15 * 2003 - Created version 1.0 for Linux 2.4.x.
16 * 2006 - Ported to Linux 2.6, added nowayout and MAGICCLOSE
22 * reset the computer system in case of a software fault.
30 * for yet another little while to reset the system.
33 * reset the system (causing a reboot) after the timeout occurs.
38 * For an example userspace keep-alive daemon, see:
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Dimgpdc_wdt.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Based on drivers/watchdog/sunxi_wdt.c Copyright (c) 2013 Carlo Caione
11 * -----
12 * The timeout value is rounded to the next power of two clock cycles.
16 * timeout = 2^(delay + 1) clock cycles
22 * guarantees that the actual watchdog timeout will be _at least_ the value
25 * The following table shows how the user-configured timeout relates
26 * to the actual hardware timeout (watchdog clock @ 40000 Hz):
28 * input timeout | WD_DELAY | actual timeout
29 * -----------------------------------
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Dmpc8xxx_wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * mpc8xxx_wdt.c - MPC8xx/MPC83xx/MPC86xx watchdog userspace interface
35 #define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit.*/
56 static u16 timeout; variable
57 module_param(timeout, ushort, 0);
58 MODULE_PARM_DESC(timeout,
59 "Watchdog timeout in seconds. (1<timeout<65535, default="
62 static bool reset = 1; variable
63 module_param(reset, bool, 0);
64 MODULE_PARM_DESC(reset,
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Dimx2_wdt.c1 // SPDX-License-Identifier: GPL-2.0
14 * ---- -----
15 * Registers: 32-bit 16-bit
18 * Halt on suspend: Manual Can be automatic
34 #define DRIVER_NAME "imx2-wdt"
37 #define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */
38 #define IMX2_WDT_WCR_WDW BIT(7) /* -> Watchdog disable for WAIT */
39 #define IMX2_WDT_WCR_WDA BIT(5) /* -> External Reset WDOG_B */
40 #define IMX2_WDT_WCR_SRS BIT(4) /* -> Software Reset Signal */
41 #define IMX2_WDT_WCR_WRE BIT(3) /* -> WDOG Reset Enable */
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
16 on-line as fast as possible after a lock-up. There's both a watchdog
21 <file:Documentation/watchdog/watchdog-api.rst> in the kernel source.
42 bool "Disable watchdog shutdown on close"
51 bool "Update boot-enabled watchdog until userspace takes over"
58 the watchdog on its own. Thus if your userspace does not start fast
62 int "Timeout value for opening watchdog device"
77 bool "Enable watchdog hrtimer-based pretimeouts"
88 depends on WATCHDOG_CORE
94 depends on WATCHDOG_PRETIMEOUT_GOV
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Drzg2l_wdt.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/reset.h>
65 ndelay(priv->delay); in rzg2l_wdt_wait_delay()
80 writel_relaxed(val, priv->base + reg); in rzg2l_wdt_write()
93 /* 2 consecutive overflow cycle needed to trigger reset */ in rzg2l_wdt_init_timeout()
94 time_out = (wdev->timeout * (MICRO / 2)) / in rzg2l_wdt_init_timeout()
95 rzg2l_wdt_get_cycle_usec(priv->osc_clk_rate, 0); in rzg2l_wdt_init_timeout()
104 ret = pm_runtime_resume_and_get(wdev->parent); in rzg2l_wdt_start()
108 ret = reset_control_deassert(priv->rstc); in rzg2l_wdt_start()
110 pm_runtime_put(wdev->parent); in rzg2l_wdt_start()
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Dib700wdt.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Based on advantechwdt.c which is based on acquirewdt.c which
8 * is based on wdt.c.
10 * (c) Copyright 2000-2001 Marek Michalkiewicz <[email protected]>
12 * Based on acquirewdt.c which is based on wdt.c.
20 * "AS-IS" and at no charge.
24 * 14-Dec-2001 Matt Domsch <[email protected]>
26 * Added timeout module option to override default
58 * The function of the watchdog timer is to reset the system
60 * watchdog timer and allow the system to reset, write I/O port 0443H.
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Dasm9260_wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2014 Oleksij Rempel <linux@rempel-privat.de>
16 #include <linux/reset.h>
25 /* This bit set if timeout reached. Cleared by SW. */
27 /* HW Reset on timeout */
35 * depends on used clock: T = WDCLK * (0xff + 1) * 4
71 iowrite32(0xaa, priv->iobase + HW_WDFEED); in asm9260_wdt_feed()
72 iowrite32(0x55, priv->iobase + HW_WDFEED); in asm9260_wdt_feed()
82 counter = ioread32(priv->iobase + HW_WDTV); in asm9260_wdt_gettimeleft()
84 return counter / priv->wdt_freq; in asm9260_wdt_gettimeleft()
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/linux-6.14.4/Documentation/userspace-api/
Dntsync.rst5 This page documents the user-space API for the ntsync driver.
8 primitives by user-space NT emulators. It exists because implementation
9 in user-space, using existing tools, cannot match Windows performance
23 A semaphore holds a single volatile 32-bit counter, and a static 32-bit
30 A mutex holds a volatile 32-bit recursion count, and a volatile 32-bit
38 tracked automatically based on thread death, but rather must be
50 are two types of events, auto-reset and manual-reset. An auto-reset
51 event is designaled when a wait is satisfied; a manual-reset event is
54 Unless specified otherwise, all operations on an object are atomic and
55 totally ordered with respect to other operations on the same object.
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/linux-6.14.4/drivers/fsi/
Dfsi-sbefifo.c1 // SPDX-License-Identifier: GPL-2.0
19 #include <linux/fsi-sbefifo.h>
38 * The SBEFIFO is a pipe-like FSI device for communicating with
39 * the self boot engine on POWER processors.
50 #define SBEFIFO_UP 0x00 /* FSI -> Host */
51 #define SBEFIFO_DOWN 0x40 /* Host -> FSI */
53 /* Per-bank registers */
69 #define SBEFIFO_REQ_RESET 0x0C /* (Up only) Reset Request */
70 #define SBEFIFO_PERFORM_RESET 0x10 /* (Down only) Perform Reset */
85 SBE_STATE_IPLING = 0x1, // IPL'ing - autonomous mode (transient)
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/linux-6.14.4/include/uapi/linux/
Dfsi.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
26 #define SCOM_INTF_ERR_ABORT 0x00000004 /* PIB reset during access */
33 __u8 pib_status; /* 3-bit PIB status */
40 #define SCOM_PIB_PARITY_ERR 6 /* Parity error on the PIB bus */
41 #define SCOM_PIB_TIMEOUT 7 /* Bus timeout */
49 /* Flags for SCOM reset */
50 #define SCOM_RESET_INTF 0x00000001 /* Reset interface */
51 #define SCOM_RESET_PIB 0x00000002 /* Reset PIB */
63 * FSI_SBEFIFO_CMD_TIMEOUT sets the timeout for writing data to the SBEFIFO.
65 * The command timeout is specified in seconds. The minimum value of command
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/linux-6.14.4/arch/arm/mach-meson/
Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 #include <linux/reset.h>
23 #define MESON_SMP_SRAM_CPU_CTRL_ADDR_REG(c) (0x04 + ((c - 1) << 2))
31 #define MESON_CPU_PWR_A9_MEM_PD0_M(c) (0x0f << (32 - (c * 4)))
106 meson_smp_prepare_cpus("arm,cortex-a5-scu", "amlogic,meson8b-pmu", in meson8b_smp_prepare_cpus()
107 "amlogic,meson8b-smp-sram"); in meson8b_smp_prepare_cpus()
112 meson_smp_prepare_cpus("arm,cortex-a9-scu", "amlogic,meson8-pmu", in meson8_smp_prepare_cpus()
113 "amlogic,meson8-smp-sram"); in meson8_smp_prepare_cpus()
119 * Set the entry point before powering on the CPU through the SCU. This in meson_smp_begin_secondary_boot()
121 * system without power-cycling, or when taking the CPU offline and in meson_smp_begin_secondary_boot()
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/linux-6.14.4/drivers/char/ipmi/
Dipmi_watchdog.c1 // SPDX-License-Identifier: GPL-2.0+
44 * that can reasonably support the IPMI NMI watchdog timeout at this
81 /* Operations that can be performed on a pretimout. */
87 /* Actions to perform on a full timeout. */
98 * pre-timeout in seconds.
110 * 6 (the timeout time) of the set command, and bytes 6 and 7 (the
111 * timeout time) and 8 and 9 (the current countdown value) of the
112 * response. The timeout value is given in seconds (in the command it
132 /* Default the timeout to 10 seconds. */
133 static int timeout = 10; variable
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/linux-6.14.4/drivers/i2c/busses/
Di2c-ali1535.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 This is the driver for the SMB Host controller on
22 by comparing this driver to the i2c-ali15x3 driver.
26 ACPI-compliant Power Management Unit (PMU).
87 #define ALI1535_DEV10B_EN 0x80 /* Enable 10-bit addressing in */
89 #define ALI1535_T_OUT 0x08 /* Time-out Command (write) */
90 #define ALI1535_A_HIGH_BIT9 0x08 /* Bit 9 of 10-bit address in */
91 /* Alert-Response-Address */
94 #define ALI1535_A_HIGH_BIT8 0x04 /* Bit 8 of 10-bit address in */
95 /* Alert-Response-Address */
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Di2c-ali15x3.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 This is the driver for the SMB Host controller on
25 on the PCI bus. An output of lspci will show something similar
34 ACPI-compliant Power Management Unit (PMU).
42 The SMB Target controller on the M15X3 is not enabled.
82 /* this is what the Award 1004 BIOS sets them to on a ASUS P5A MB.
127 - SMB I/O address is initialized in ali15x3_setup()
128 - Device is enabled in ali15x3_setup()
129 - We can use the addresses in ali15x3_setup()
133 The data sheet says that the address registers are read-only in ali15x3_setup()
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/linux-6.14.4/drivers/w1/masters/
Dmxc_w1.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved.
22 # define MXC_W1_CONTROL_WR(x) BIT(5 - (x))
37 * reset the device on the One Wire interface
38 * on the hardware
43 ktime_t timeout; in mxc_w1_ds2_reset_bus() local
45 writeb(MXC_W1_CONTROL_RPP, dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
47 /* Wait for reset sequence 511+512us, use 1500us for sure */ in mxc_w1_ds2_reset_bus()
48 timeout = ktime_add_us(ktime_get(), 1500); in mxc_w1_ds2_reset_bus()
53 u8 ctrl = readb(dev->regs + MXC_W1_CONTROL); in mxc_w1_ds2_reset_bus()
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/linux-6.14.4/sound/soc/amd/rpl/
Drpl-pci-acp6x.c1 // SPDX-License-Identifier: GPL-2.0+
24 int timeout; in rpl_power_on() local
33 timeout = 0; in rpl_power_on()
34 while (++timeout < 500) { in rpl_power_on()
40 return -ETIMEDOUT; in rpl_power_on()
46 int timeout; in rpl_reset() local
49 timeout = 0; in rpl_reset()
50 while (++timeout < 500) { in rpl_reset()
57 timeout = 0; in rpl_reset()
58 while (++timeout < 500) { in rpl_reset()
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/linux-6.14.4/drivers/net/ethernet/arc/
Demac_mdio.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
19 * arc_mdio_complete_wait - Waits until MDIO transaction is completed.
22 * returns: 0 on success, -ETIMEDOUT on a timeout.
34 /* Reset "MDIO complete" flag */ in arc_mdio_complete_wait()
42 return -ETIMEDOUT; in arc_mdio_complete_wait()
46 * arc_mdio_read - MDIO interface read function.
51 * returns: The register contents on success, -ETIMEDOUT on a timeout.
58 struct arc_emac_priv *priv = bus->priv; in arc_mdio_read()
71 dev_dbg(priv->dev, "arc_mdio_read(phy_addr=%i, reg_num=%x) = %x\n", in arc_mdio_read()
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