1 // SPDX-License-Identifier: GPL-2.0-or-later
13 #include <linux/reset.h>
23 #define MESON_SMP_SRAM_CPU_CTRL_ADDR_REG(c)	(0x04 + ((c - 1) << 2))
31 #define MESON_CPU_PWR_A9_MEM_PD0_M(c)		(0x0f << (32 - (c * 4)))
106 	meson_smp_prepare_cpus("arm,cortex-a5-scu", "amlogic,meson8b-pmu",  in meson8b_smp_prepare_cpus()
107 			       "amlogic,meson8b-smp-sram");  in meson8b_smp_prepare_cpus()
112 	meson_smp_prepare_cpus("arm,cortex-a9-scu", "amlogic,meson8-pmu",  in meson8_smp_prepare_cpus()
113 			       "amlogic,meson8-smp-sram");  in meson8_smp_prepare_cpus()
119 	 * Set the entry point before powering on the CPU through the SCU. This  in meson_smp_begin_secondary_boot()
121 	 * system without power-cycling, or when taking the CPU offline and  in meson_smp_begin_secondary_boot()
128 	 * SCU Power on CPU (needs to be done before starting the CPU,  in meson_smp_begin_secondary_boot()
136 	unsigned long timeout;  in meson_smp_finalize_secondary_boot()  local
138 	timeout = jiffies + (10 * HZ);  in meson_smp_finalize_secondary_boot()
140 		if (!time_before(jiffies, timeout)) {  in meson_smp_finalize_secondary_boot()
141 			pr_err("Timeout while waiting for CPU%d status\n",  in meson_smp_finalize_secondary_boot()
143 			return -ETIMEDOUT;  in meson_smp_finalize_secondary_boot()
163 		pr_err("Couldn't get the reset controller for CPU%d\n", cpu);  in meson8_smp_boot_secondary()
169 	/* Reset enable */  in meson8_smp_boot_secondary()
172 		pr_err("Failed to assert CPU%d reset\n", cpu);  in meson8_smp_boot_secondary()
176 	/* CPU power ON */  in meson8_smp_boot_secondary()
194 	/* Reset disable */  in meson8_smp_boot_secondary()
197 		pr_err("Failed to de-assert CPU%d reset\n", cpu);  in meson8_smp_boot_secondary()
220 		pr_err("Couldn't get the reset controller for CPU%d\n", cpu);  in meson8b_smp_boot_secondary()
236 	/* Reset enable */  in meson8b_smp_boot_secondary()
239 		pr_err("Failed to assert CPU%d reset\n", cpu);  in meson8b_smp_boot_secondary()
265 		pr_err("Timeout while polling PMU for CPU%d status\n", cpu);  in meson8b_smp_boot_secondary()
277 	/* Reset disable */  in meson8b_smp_boot_secondary()
280 		pr_err("Failed to de-assert CPU%d reset\n", cpu);  in meson8b_smp_boot_secondary()
313 	unsigned long timeout;  in meson8_smp_cpu_kill()  local
315 	timeout = jiffies + (50 * HZ);  in meson8_smp_cpu_kill()
323 	} while (time_before(jiffies, timeout));  in meson8_smp_cpu_kill()
326 		pr_err("Error while waiting for SCU power-off on CPU%d\n",  in meson8_smp_cpu_kill()
328 		return -ETIMEDOUT;  in meson8_smp_cpu_kill()
368 		pr_err("Error while waiting for SCU power-off on CPU%d\n",  in meson8b_smp_cpu_kill()
370 		return -ETIMEDOUT;  in meson8b_smp_cpu_kill()
431 CPU_METHOD_OF_DECLARE(meson8_smp, "amlogic,meson8-smp", &meson8_smp_ops);
432 CPU_METHOD_OF_DECLARE(meson8b_smp, "amlogic,meson8b-smp", &meson8b_smp_ops);