Searched +full:r9a09g057 +full:- +full:icu (Results 1 – 4 of 4) sorted by relevance
/linux-6.14.4/arch/arm64/boot/dts/renesas/ |
D | r9a09g057.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/clock/renesas,r9a09g057-cpg.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 compatible = "renesas,r9a09g057"; 13 #address-cells = <2>; 14 #size-cells = <2>; 16 audio_extal_clk: audio-clk { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 20 clock-frequency = <0>; [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/interrupt-controller/ |
D | renesas,rzv2h-icu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/renesas,rzv2h-icu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Fabrizio Castro <[email protected]> 11 - Geert Uytterhoeven <[email protected]> 14 - $ref: /schemas/interrupt-controller.yaml# 17 The Interrupt Control Unit (ICU) handles external interrupts (NMI, IRQ, and 23 const: renesas,r9a09g057-icu # RZ/V2H(P) 25 '#interrupt-cells': [all …]
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/linux-6.14.4/drivers/irqchip/ |
D | irq-renesas-rzv2h.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Renesas RZ/V2H(P) ICU Driver 5 * Based on irq-renesas-rzg2l.c 84 * struct rzv2h_icu_priv - Interrupt Control Unit controller private data structure. 99 return data->domain->host_data; in irq_data_to_priv() 109 scoped_guard(raw_spinlock, &priv->lock) { in rzv2h_icu_eoi() 111 tintirq_nr = hw_irq - ICU_TINT_START; in rzv2h_icu_eoi() 114 writel_relaxed(bit, priv->base + ICU_TSCLR); in rzv2h_icu_eoi() 116 tintirq_nr = hw_irq - ICU_IRQ_START; in rzv2h_icu_eoi() 119 writel_relaxed(bit, priv->base + ICU_ISCLR); in rzv2h_icu_eoi() [all …]
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/linux-6.14.4/drivers/watchdog/ |
D | rzv2h_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0 61 * The down-counter is refreshed and starts counting operation on in rzv2h_wdt_ping() 64 writeb(0x0, priv->base + WDTRR); in rzv2h_wdt_ping() 65 writeb(0xFF, priv->base + WDTRR); in rzv2h_wdt_ping() 75 writew(wdtcr, priv->base + WDTCR); in rzv2h_wdt_setup() 77 /* Enable interrupt output to the ICU. */ in rzv2h_wdt_setup() 78 writeb(0, priv->base + WDTRCR); in rzv2h_wdt_setup() 81 writew(0, priv->base + WDTSR); in rzv2h_wdt_setup() 89 ret = pm_runtime_resume_and_get(wdev->parent); in rzv2h_wdt_start() 93 ret = reset_control_deassert(priv->rstc); in rzv2h_wdt_start() [all …]
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