/aosp_15_r20/external/XNNPACK/scripts/ |
H A D | generate-f32-spmm.sh | 16 tools/xngen src/f32-spmm/scalar-pipelined.c.in -D MR=1 -D NR=1 -o src/f32-spmm/gen/1x1-minmax-scala… 17 tools/xngen src/f32-spmm/scalar-pipelined.c.in -D MR=2 -D NR=1 -o src/f32-spmm/gen/2x1-minmax-scala… 18 tools/xngen src/f32-spmm/scalar-pipelined.c.in -D MR=4 -D NR=1 -o src/f32-spmm/gen/4x1-minmax-scala… 19 tools/xngen src/f32-spmm/scalar-pipelined.c.in -D MR=8 -D NR=1 -o src/f32-spmm/gen/8x1-minmax-scala… 59 tools/xngen src/f32-spmm/neon-pipelined.c.in -D MR=4 -D NR=1 -D FMA=0 -o src/f32-spmm/gen/4x1-minm… 60 tools/xngen src/f32-spmm/neon-pipelined.c.in -D MR=8 -D NR=1 -D FMA=0 -o src/f32-spmm/gen/8x1-minm… 61 tools/xngen src/f32-spmm/neon-pipelined.c.in -D MR=16 -D NR=1 -D FMA=0 -o src/f32-spmm/gen/16x1-min… 62 tools/xngen src/f32-spmm/neon-pipelined.c.in -D MR=32 -D NR=1 -D FMA=0 -o src/f32-spmm/gen/32x1-min… 64 tools/xngen src/f32-spmm/neon-pipelined.c.in -D MR=4 -D NR=1 -D FMA=1 -o src/f32-spmm/gen/4x1-minm… 65 tools/xngen src/f32-spmm/neon-pipelined.c.in -D MR=8 -D NR=1 -D FMA=1 -o src/f32-spmm/gen/8x1-minm… [all …]
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/aosp_15_r20/external/XNNPACK/test/ |
H A D | f32-igemm-minmax.yaml | 15 pipelined: true 20 pipelined: true 25 pipelined: true 34 pipelined: true 39 pipelined: true 45 pipelined: true 50 pipelined: true 55 pipelined: true 60 pipelined: true 65 pipelined: true [all …]
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H A D | f32-gemm-minmax.yaml | 19 pipelined: true 24 pipelined: true 29 pipelined: true 38 pipelined: true 43 pipelined: true 49 pipelined: true 54 pipelined: true 63 pipelined: true 68 pipelined: true 73 pipelined: true [all …]
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H A D | f32-gemminc-minmax.yaml | 11 pipelined: true 16 pipelined: true 25 pipelined: true 30 pipelined: true 35 pipelined: true 40 pipelined: true 45 pipelined: true 58 pipelined: true 63 pipelined: true 68 pipelined: true [all …]
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/aosp_15_r20/external/nist-sip/java/gov/nist/javax/sip/parser/ |
H A D | PipelinedMsgParser.java | 46 * This implements a pipelined message parser suitable for use with a stream - 117 * This is the constructor for the pipelined parser. 132 * This is the constructor for the pipelined parser. 150 * Create a new pipelined parser from an existing one. 152 * @return A new pipelined parser that reads from the same input stream. 206 * This is input reading thread for the pipelined parser. You feed it input 459 * PipedInputStream from pipelined parser to avoid a copy.
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/aosp_15_r20/external/XNNPACK/tools/ |
H A D | generate-dwconv-test.py | 310 pipelined micro-kernels to separately test prologue + epiloque 311 of the pipelined loop and iteration of the pipelined loop. 381 pipelined = bool(ukernel_spec.get("pipelined", False)) 389 name, primary_tile, cr, kr, cr, init_fn, requantization, pipelined, isa)
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H A D | generate-spmm-test.py | 391 pipelined micro-kernels to separately test prologue + epiloque 392 of the pipelined loop and iteration of the pipelined loop. 449 pipelined = bool(ukernel_spec.get("pipelined", False)) 456 pipelined, isa)
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H A D | generate-gemm-test.py | 891 pipelining. Additional test cases are generated for software pipelined 892 micro-kernels to separately test prologue + epiloque of the pipelined loop 893 and iteration of the pipelined loop. 986 pipelined = bool(ukernel_spec.get("pipelined", False)) 995 init_fn, requantization, pipelined, isa,
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/aosp_15_r20/external/mesa3d/src/gallium/drivers/crocus/ |
H A D | crocus_pipe_control.c | 108 * 3DSTATE_HIER_DEPTH_BUFFER) SW must first issue a pipelined depth stall 109 * (PIPE_CONTROL with Depth Stall bit set), followed by a pipelined depth 111 * another pipelined depth stall (PIPE_CONTROL with Depth Stall bit set), 204 /* Emit a pipelined flush to either flush render and texture cache for 233 * produced by non-pipelined state commands), software needs to first
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/aosp_15_r20/external/pytorch/aten/src/ATen/native/cuda/cutlass_extensions/gemm/threadblock/ |
H A D | default_mma_bf16.h | 101 // Define the threadblock-scoped pipelined matrix multiply 284 // Define the threadblock-scoped pipelined matrix multiply 359 // Define the threadblock-scoped pipelined matrix multiply 439 // Define the threadblock-scoped pipelined matrix multiply 521 // Define the threadblock-scoped pipelined matrix multiply
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H A D | default_mma.h | 83 // Define the threadblock-scoped pipelined matrix multiply 158 // Define the threadblock-scoped pipelined matrix multiply 238 // Define the threadblock-scoped pipelined matrix multiply 320 // Define the threadblock-scoped pipelined matrix multiply
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/aosp_15_r20/hardware/nxp/nfc/pn8x/halimpl/dnld/ |
D | phDnldNfc_Internal.h | 29 except pipelined WRITE */ 35 /* DL Host Short Frame Buffer Size for pipelined WRITE RSP */ 90 phDnldNfc_StatePipelined, /* Write requests to be pipelined state */ 199 tPipeLineWrFrameInfo; /* Buffer to hold the pipelined write frame */
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/aosp_15_r20/frameworks/base/core/java/android/os/ |
H A D | VibrationAttributes.java | 203 * Flag requesting that this vibration effect be pipelined with other vibration effects from the 206 * <p>Pipelined effects won't cancel a running pipelined effect, but will instead play after 207 * it completes. However, only one pipelined effect can be waiting at a time - so if an effect
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/aosp_15_r20/external/tensorflow/tensorflow/core/protobuf/tpu/ |
H A D | tpu_embedding_configuration.proto | 67 // pipelined with that of the TensorCore. This parameter only affects results 71 // false: The execution of the sparse core is not pipelined with that of the 79 // true: The execution of the sparse core is pipelined with that of the
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/aosp_15_r20/hardware/nxp/nfc/snxxx/halimpl/dnld/ |
D | phDnldNfc_Internal.h | 27 /* DL Host Short Frame Buffer Size for pipelined WRITE RSP */ 77 phDnldNfc_StatePipelined, /* Write requests to be pipelined state */ 187 tPipeLineWrFrameInfo; /* Buffer to hold the pipelined write frame */
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/aosp_15_r20/external/pytorch/torch/distributed/_symmetric_memory/ |
H A D | __init__.py | 143 Perform the following logic with micro-pipelined computation and 200 Perform the following logic with micro-pipelined computation and 372 Perform the following logic with micro-pipelined computation and 458 Perform the following logic with micro-pipelined computation and 622 Perform the following logic with micro-pipelined computation and
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/aosp_15_r20/external/pytorch/aten/src/ATen/native/transformers/cuda/mem_eff_attention/gemm/ |
H A D | custom_mma_pipelined.h | 210 // NOT IMPLEMENTED FOR PIPELINED in set_prologue_done() 215 // NOT NEEDED FOR PIPELINED in set_zero_outside_bounds() 247 // NOT IMPLEMENTED FOR PIPELINED in prologue()
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/aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
H A D | ModuloSchedule.cpp | 121 // in each stage of the pipelined loop. in generatePipelinedLoop() 131 // Rearrange the instructions to generate the new, pipelined loop, in generatePipelinedLoop() 362 /// Generate Phis for the specific block in the generated pipelined code. 559 // We define the Phis after creating the new pipelined code, so in generateExistingPhis() 600 /// Generate Phis for the specified block in the generated pipelined code. 602 /// use in the pipelined sequence. 976 /// Clone the instruction for the new pipelined loop and update the 997 /// Clone the instruction for the new pipelined loop. If needed, this 1514 /// Describes an operand in the kernel of a pipelined loop. Characteristics of
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/aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/ |
H A D | ModuloSchedule.cpp | 117 // in each stage of the pipelined loop. in generatePipelinedLoop() 133 // Rearrange the instructions to generate the new, pipelined loop, in generatePipelinedLoop() 362 /// Generate Phis for the specific block in the generated pipelined code. 559 // We define the Phis after creating the new pipelined code, so in generateExistingPhis() 600 /// Generate Phis for the specified block in the generated pipelined code. 602 /// use in the pipelined sequence. 994 /// Clone the instruction for the new pipelined loop and update the 1004 /// Clone the instruction for the new pipelined loop. If needed, this 1540 /// Describes an operand in the kernel of a pipelined loop. Characteristics of
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H A D | MachinePipeliner.cpp | 15 // more prolog blocks, the pipelined kernel, and one or more epilog blocks. If 24 // where an instruction may be inserted in the pipelined schedule. 102 STATISTIC(NumPipelined, "Number of loops software pipelined"); 168 cl::desc("Instead of emitting the pipelined code, annotate instructions " 332 /// Return true if the loop can be software pipelined. The algorithm is 628 << "Pipelined succesfully!"; in schedule() 1965 /// Process the nodes in the computed order and create the pipelined schedule 2044 // If a schedule is found, ensure non-pipelined instructions are in stage 0 in schedulePipeline() 2708 // Put the non-pipelined instruction as early as possible in the schedule in normalizeNonPipelinedInstructions() 2720 << ") is not pipelined; moving from cycle " << OldCycle in normalizeNonPipelinedInstructions() [all …]
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/aosp_15_r20/prebuilts/go/linux-x86/src/net/textproto/ |
D | pipeline.go | 11 // A Pipeline manages a pipelined in-order request/response sequence. 26 // A pipelined server can use the same calls to ensure that
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/aosp_15_r20/external/llvm/test/CodeGen/Hexagon/ |
H A D | swp-multi-loops.ll | 5 ; Check if the first loop is pipelined. 12 ; Check if the second loop is pipelined.
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/aosp_15_r20/external/mesa3d/src/panfrost/midgard/ |
H A D | midgard_ra_pipeline.c | 75 /* The fragment colour can't be pipelined (well, it is in mir_pipeline_ins() 76 * pipelined in r0, but this is a delicate dance with in mir_pipeline_ins()
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/aosp_15_r20/external/mesa3d/src/intel/compiler/elk/ |
H A D | elk_eu_defines.h | 996 /* No override. Use the non-pipelined state or surface state cache settings 1024 /* No override. Use the non-pipelined or surface state cache settings for L1 1056 /* No override. Use the non-pipelined or surface state cache settings for L1 1084 /* No override. Use the non-pipelined or surface state cache settings for L1
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/aosp_15_r20/external/llvm/lib/CodeGen/ |
H A D | MachinePipeliner.cpp | 44 // more prolog blocks, the pipelined kernel, and one or more epilog blocks. If 53 // where an instruction may be inserted in the pipelined schedule. 98 STATISTIC(NumPipelined, "Number of loops software pipelined"); 200 /// Set to true if a valid pipelined schedule is found for the loop. 750 /// Return true if the loop can be software pipelined. The algorithm is 2111 /// Process the nodes in the computed order and create the pipelined schedule 2216 // in each stage of the pipelined loop. in generatePipelinedLoop() 2225 // Rearrange the instructions to generate the new, pipelined loop, in generatePipelinedLoop() 2468 /// Generate Phis for the specific block in the generated pipelined code. 2667 // We define the Phis after creating the new pipelined code, so in generateExistingPhis() [all …]
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