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/linux-6.14.4/Documentation/devicetree/bindings/clock/
Dfsl,qoriq-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/fsl,qoriq-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <[email protected]>
24 --------------- -------------
25 1.0 p4080, p5020, p5040
30 The clockgen node should act as a clock provider, though in older device
31 trees the children of the clockgen node are the clock providers.
36 - items:
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/linux-6.14.4/arch/powerpc/boot/dts/fsl/
Dp5020si-pre.dtsi2 * P5020/P5010 Silicon/SoC Device Tree Source (pre include)
4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
35 /dts-v1/;
40 compatible = "fsl,P5020";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
93 #address-cells = <1>;
94 #size-cells = <0>;
99 clocks = <&clockgen 1 0>;
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Dp5020si-post.dtsi2 * P5020/5010 Silicon/SoC Device Tree Source (post include)
4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
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/linux-6.14.4/drivers/clk/
Dclk-qoriq.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
14 #include <linux/clk-provider.h>
34 #define CGA_PLL4 4 /* only on clockgen-1.0, which lacks CGB */
66 struct clockgen;
82 void (*init_periph)(struct clockgen *cg);
83 int cmux_to_group[NUM_CMUX + 1]; /* array should be -1 terminated */
88 struct clockgen { struct
100 static struct clockgen clockgen; argument
103 static void cg_out(struct clockgen *cg, u32 val, u32 __iomem *reg) in cg_out()
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