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/linux-6.14.4/Documentation/devicetree/bindings/mmc/
Dsprd,sdhci-r11.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/sprd,sdhci-r11.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Orson Zhai <[email protected]>
11 - Baolin Wang <[email protected]>
12 - Chunyan Zhang <[email protected]>
16 const: sprd,sdhci-r11
19 maxItems: 1
22 maxItems: 1
[all …]
Dcdns,sdhci.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/cdns,sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <[email protected]>
15 - enum:
16 - amd,pensando-elba-sd4hc
17 - microchip,mpfs-sd4hc
18 - microchip,pic64gx-sd4hc
19 - socionext,uniphier-sd4hc
[all …]
Dbrcm,sdhci-brcmstb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/brcm,sdhci-brcmstb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Al Cooper <[email protected]>
11 - Florian Fainelli <[email protected]>
16 - items:
17 - enum:
18 - brcm,bcm7216-sdhci
19 - const: brcm,bcm7445-sdhci
[all …]
Dmmc-controller-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MMC Controller & Slots Common Properties
10 - Ulf Hansson <[email protected]>
13 These properties are common to multiple MMC host controllers and the
14 possible slots or ports for multi-slot controllers.
17 "#address-cells":
18 const: 1
[all …]
Dsdhci-am654.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: TI AM654 MMC Controller
11 - Ulf Hansson <[email protected]>
14 - $ref: sdhci-common.yaml#
19 - enum:
20 - ti,am62-sdhci
[all …]
/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dipq9574-rdp418.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
6 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
9 /dts-v1/;
11 #include "ipq9574-rdp-common.dtsi"
14 model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C2";
15 compatible = "qcom,ipq9574-ap-al02-c2", "qcom,ipq9574";
20 pinctrl-0 = <&sdc_default_state>;
21 pinctrl-names = "default";
22 mmc-ddr-1_8v;
[all …]
Dipq9574-rdp433.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include "ipq9574-rdp-common.dtsi"
15 model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C7";
16 compatible = "qcom,ipq9574-ap-al02-c7", "qcom,ipq9574";
24 pinctrl-0 = <&pcie1_default>;
25 pinctrl-names = "default";
27 perst-gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
[all …]
Dqcs615-ride.dts1 // SPDX-License-Identifier: BSD-3-Clause
5 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
14 compatible = "qcom,qcs615-ride", "qcom,qcs615";
15 chassis-type = "embedded";
24 stdout-path = "serial0:115200n8";
28 sleep_clk: sleep-clk {
29 compatible = "fixed-clock";
[all …]
/linux-6.14.4/arch/arm64/boot/dts/mediatek/
Dmt7986a-bananapi-bpi-r3-emmc.dtso1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
11 compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
14 &{/soc/mmc@11230000} {
15 bus-width = <8>;
16 max-frequency = <200000000>;
17 cap-mmc-highspeed;
18 mmc-hs200-1_8v;
19 mmc-hs400-1_8v;
20 hs400-ds-delay = <0x14014>;
[all …]
Dmt7988a-bananapi-bpi-r4-emmc.dtso1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Author: Frank Wunderlich <frank-w@public-files.de>
7 /dts-v1/;
11 compatible = "bananapi,bpi-r4", "mediatek,mt7988a";
14 &{/soc/mmc@11230000} {
15 pinctrl-names = "default", "state_uhs";
16 pinctrl-0 = <&mmc0_pins_emmc_51>;
17 pinctrl-1 = <&mmc0_pins_emmc_51>;
18 bus-width = <8>;
19 max-frequency = <200000000>;
[all …]
Dmt8188-evb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 /dts-v1/;
11 compatible = "mediatek,mt8188-evb", "mediatek,mt8188";
26 stdout-path = "serial0:115200n8";
34 reserved_memory: reserved-memory {
35 #address-cells = <2>;
36 #size-cells = <2>;
40 compatible = "shared-dma-pool";
42 no-map;
52 pinctrl-names = "default";
[all …]
Dmt7986a-rfb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/pinctrl/mt65xx.h>
14 chassis-type = "embedded";
15 compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a";
22 stdout-path = "serial0:115200n8";
30 reg_1p8v: regulator-1p8v {
31 compatible = "regulator-fixed";
32 regulator-name = "fixed-1.8V";
33 regulator-min-microvolt = <1800000>;
[all …]
/linux-6.14.4/arch/arm64/boot/dts/exynos/
Dexynos7885-jackpotlte.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Galaxy A8 2018 (jackpotlte/SM-A530F) device tree source
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
18 chassis-type = "handset";
28 stdout-path = &serial_2;
38 gpio-keys {
39 compatible = "gpio-keys";
[all …]
Dexynos850-e850-96.dts1 // SPDX-License-Identifier: GPL-2.0
3 * WinLink E850-96 board device tree source
8 * Device tree source file for WinLink's E850-96 board which is based on
12 /dts-v1/;
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/leds/common.h>
20 model = "WinLink E850-96 board";
21 compatible = "winlink,e850-96", "samsung,exynos850";
29 stdout-path = &serial_0;
[all …]
/linux-6.14.4/arch/arm64/boot/dts/sprd/
Dwhale2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/clock/sprd,sc9860-clk.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
16 compatible = "simple-bus";
17 #address-cells = <2>;
18 #size-cells = <2>;
66 ap-apb@70000000 {
67 compatible = "simple-bus";
[all …]
/linux-6.14.4/drivers/mmc/core/
Dhost.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/mmc/core/host.c
6 * Copyright (C) 2007-2008 Pierre Ossman
9 * MMC host class device management
21 #include <linux/mmc/host.h>
22 #include <linux/mmc/card.h>
23 #include <linux/mmc/slot-gpio.h>
28 #include "slot-gpio.h"
45 if (!host->bus_ops) in mmc_host_class_prepare()
49 if (host->bus_ops->pre_suspend) in mmc_host_class_prepare()
[all …]
/linux-6.14.4/arch/arm64/boot/dts/freescale/
Dfsl-lx2162a-sr-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree file for LX2162A-SOM
5 // Copyright 2021 Rabeeh Khoury <rabeeh@solid-run.com>
6 // Copyright 2023 Josua Mayer <josua@solid-run.com>
13 phy-handle = <&ethernet_phy0>;
14 phy-connection-type = "rgmii-id";
20 ethernet_phy0: ethernet-phy@1 {
21 reg = <1>;
26 bus-width = <8>;
27 mmc-hs200-1_8v;
[all …]
Dfsl-lx2160a-cex7.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree file for LX2160A-CEx7
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "solidrun,lx2160a-cex7", "fsl,lx2160a";
19 sb_3v3: regulator-sb3v3 {
20 compatible = "regulator-fixed";
21 regulator-name = "RT7290";
22 regulator-min-microvolt = <3300000>;
23 regulator-max-microvolt = <3300000>;
[all …]
/linux-6.14.4/arch/arm64/boot/dts/rockchip/
Drk3399-nanopc-t4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * FriendlyElec NanoPC-T4 board device tree source
11 /dts-v1/;
12 #include "rk3399-nanopi4.dtsi"
15 model = "FriendlyElec NanoPC-T4";
16 compatible = "friendlyarm,nanopc-t4", "rockchip,rk3399";
18 vcc12v0_sys: regulator-vcc12v0-sys {
19 compatible = "regulator-fixed";
20 regulator-always-on;
21 regulator-boot-on;
[all …]
/linux-6.14.4/arch/arm64/boot/dts/renesas/
Dr8a77980a-condor-i.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Condor-I board on r8a77980A (ES2.0)
8 /dts-v1/;
10 #include "condor-common.dtsi"
13 model = "Renesas Condor-I board based on r8a77980A (ES2.0)";
14 compatible = "renesas,condor-i", "renesas,r8a77980a", "renesas,r8a77980";
18 mmc-hs400-1_8v;
Dr8a774e1-hihope-rzg2h.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include "hihope-rev4.dtsi"
14 compatible = "hoperun,hihope-rzg2h", "renesas,r8a774e1";
32 <&versaclock5 1>,
35 clock-names = "du.0", "du.1", "du.3",
36 "dclkin.0", "dclkin.1", "dclkin.3";
40 mmc-hs400-1_8v;
Dr8a774b1-hihope-rzg2n.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include "hihope-rev4.dtsi"
14 compatible = "hoperun,hihope-rzg2n", "renesas,r8a774b1";
32 <&versaclock5 1>,
35 clock-names = "du.0", "du.1", "du.3",
36 "dclkin.0", "dclkin.1", "dclkin.3";
40 mmc-hs400-1_8v;
Dr8a774b1-hihope-rzg2n-rev2.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include "hihope-rev2.dtsi"
14 compatible = "hoperun,hihope-rzg2n", "renesas,r8a774b1";
32 <&versaclock5 1>,
35 clock-names = "du.0", "du.1", "du.3",
36 "dclkin.0", "dclkin.1", "dclkin.3";
40 mmc-hs400-1_8v;
/linux-6.14.4/arch/arm64/boot/dts/marvell/
Darmada-3720-uDPU.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include "armada-372x.dtsi"
19 stdout-path = "serial0:115200n8";
28 compatible = "gpio-leds";
30 led-power1 {
35 led-power2 {
40 led-network1 {
[all …]
Darmada-3720-espressobin.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * Romain Perier <romain.perier@free-electrons.com>
10 #include <dt-bindings/gpio/gpio.h>
11 #include "armada-372x.dtsi"
23 stdout-path = "serial0:115200n8";
32 compatible = "regulator-gpio";
33 regulator-name = "vcc_sd1";
34 regulator-min-microvolt = <1800000>;
35 regulator-max-microvolt = <3300000>;
36 regulator-boot-on;
[all …]

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