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/linux-6.14.4/drivers/gpu/drm/panel/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
17 Y030XX067A 320x480 3.0" panel as found in the YLM RG-280M, RG-300
18 and RG-99 handheld gaming consoles.
37 NT35596 1080x1920 video mode panel as found in some Asus
46 as found in the YLM RS-97 handheld gaming console.
49 tristate "Boe BF060Y8M-AJ0 panel"
54 Say Y here if you want to enable support for Boe BF060Y8M-AJ0
56 uses 24 bit RGB per pixel. It provides a MIPI DSI interface to
66 TFT-LCD modules. The panel has a 1200x1920 resolution and uses
67 24 bit RGB per pixel. It provides a MIPI DSI interface to
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/linux-6.14.4/drivers/gpu/drm/
Ddrm_mipi_dbi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MIPI Display Bus Interface (DBI) LCD controller support
44 * This library provides helpers for MIPI Display Bus Interface (DBI)
47 * Many controllers for tiny lcd displays are MIPI compliant and can use this
50 * MIPI compliant.
52 * Only MIPI Type 1 displays are supported since a full frame memory is needed.
54 * There are 3 MIPI DBI implementation types:
62 * 1. 9-bit with the Data/Command signal as the ninth bit
64 * 3. 8-bit with the Data/Command signal as a separate D/CX pin
108 if (!dbi->read_commands) in mipi_dbi_command_is_read()
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/linux-6.14.4/include/drm/
Ddrm_mipi_dbi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * MIPI Display Bus Interface (DBI) LCD controller support
23 * struct mipi_dbi - MIPI DBI interface
70 * @tx_buf9: Buffer used for Option 1 9-bit conversion
81 * struct mipi_dbi_dev - MIPI DBI device
100 * @mode: Fixed display mode
102 struct drm_display_mode mode; member
147 * @dbi: MIPI DBI interface
170 const struct drm_display_mode *mode,
174 const struct drm_display_mode *mode, unsigned int rotation);
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Ddrm_mipi_dsi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * MIPI DSI Bus
5 * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
21 /* use Low Power Mode to transmit message */
25 * struct mipi_dsi_msg - read/write DSI buffer
50 * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format
68 * struct mipi_dsi_host_ops - DSI bus operations
100 * struct mipi_dsi_host - DSI host device
115 /* DSI mode flags */
117 /* video mode */
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/linux-6.14.4/Documentation/devicetree/bindings/phy/
Dmixel,mipi-dsi-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/mixel,mipi-dsi-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Guido Günther <[email protected]>
13 The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the
14 MIPI-DSI IP from Northwest Logic). It represents the physical layer for the
18 in either MIPI-DSI PHY mode or LVDS PHY mode.
23 - fsl,imx8mq-mipi-dphy
24 - fsl,imx8qxp-mipi-dphy
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/linux-6.14.4/drivers/staging/media/atomisp/pci/
Dsh_css_sp.h1 /* SPDX-License-Identifier: GPL-2.0 */
84 * @brief Update the mipi frame information in host_sp_communication.
86 * @param[in] frame_num The mipi frame number.
87 * @param[in] frame The pointer to the mipi frame.
95 * @brief Update the mipi metadata information in host_sp_communication.
97 * @param[in] frame_num The mipi frame number.
98 * @param[in] metadata The pointer to the mipi metadata.
106 * @brief Update the nr of mipi frames to use in host_sp_communication.
108 * @param[in] num_frames The number of mipi frames to use.
174 * @brief Initialize the DMA software-mask in the debug mode.
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/linux-6.14.4/Documentation/devicetree/bindings/display/bridge/
Dsamsung,mipi-dsim.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/samsung,mipi-dsim.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung MIPI DSIM bridge controller
10 - Inki Dae <[email protected]>
11 - Jagan Teki <[email protected]>
12 - Marek Szyprowski <[email protected]>
15 Samsung MIPI DSIM bridge controller can be found it on Exynos
21 - enum:
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Drenesas,dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/G2L MIPI DSI Encoder
10 - Biju Das <[email protected]>
13 This binding describes the MIPI DSI encoder embedded in the Renesas
14 RZ/G2L alike family of SoC's. The encoder can operate in DSI mode, with
18 - $ref: /schemas/display/dsi-controller.yaml#
23 - enum:
24 - renesas,r9a07g044-mipi-dsi # RZ/G2{L,LC}
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Dfsl,imx93-mipi-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx93-mipi-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX93 specific extensions to Synopsys Designware MIPI DSI
10 - Liu Ying <[email protected]>
13 There is a Synopsys Designware MIPI DSI Host Controller and a Synopsys
14 Designware MIPI DPHY embedded in Freescale i.MX93 SoC. Some configurations
15 and extensions to them are controlled by i.MX93 media blk-ctrl.
18 - $ref: snps,dw-mipi-dsi.yaml#
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/linux-6.14.4/Documentation/devicetree/bindings/display/panel/
Dpanel-mipi-dbi-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-mipi-dbi-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MIPI DBI SPI Panel
10 - Noralf Trønnes <[email protected]>
13 This binding is for display panels using a MIPI DBI compatible controller
14 in SPI mode.
16 The MIPI Alliance Standard for Display Bus Interface defines the electrical
23 - Power:
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Dsitronix,st7701.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jagan Teki <[email protected]>
15 several system interfaces like MIPI/RGB/SPI.
17 Techstar TS8550B is 480x854, 2-lane MIPI DSI LCD panel which has
20 Densitron DMT028VGHMCMI-1A is 480x640, 2-lane MIPI DSI LCD panel
21 which has built-in ST7701 chip.
26 - enum:
27 - anbernic,rg-arc-panel
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/linux-6.14.4/drivers/gpu/drm/tiny/
Dpanel-mipi-dbi.c1 // SPDX-License-Identifier: GPL-2.0
3 * DRM driver for MIPI DBI compatible display panels
61 if (strcmp(format_name, format->name)) in panel_mipi_dbi_get_format()
64 formats[0] = format->fourcc; in panel_mipi_dbi_get_format()
65 *bpp = format->bpp; in panel_mipi_dbi_get_format()
71 return -EINVAL; in panel_mipi_dbi_get_format()
90 * MIPI commands to execute when the display pipeline is enabled.
98 * parameter: delay in miliseconds (the No Operation command is part of the MIPI Display
124 const struct panel_mipi_dbi_config *config = (struct panel_mipi_dbi_config *)fw->data; in panel_mipi_dbi_check_commands()
126 size_t size = fw->size, commands_len; in panel_mipi_dbi_check_commands()
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/linux-6.14.4/Documentation/devicetree/bindings/media/
Dvideo-interfaces.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sakari Ailus <[email protected]>
11 - Laurent Pinchart <[email protected]>
29 #address-cells = <1>;
30 #size-cells = <0>;
45 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is
49 specify #address-cells, #size-cells properties independently for the 'port'
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/linux-6.14.4/include/media/
Dv4l2-mediabus.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <linux/v4l2-mediabus.h>
38 * The client runs in master or in slave mode. By "Master mode" an operation
39 * mode is meant, when the client (e.g., a camera sensor) is producing
40 * horizontal and vertical synchronisation. In "Slave mode" the host is
47 * Note: in BT.656 mode HSYNC, FIELD, and VSYNC are unused
60 /* FIELD = 0/1 - Field1 (odd)/Field2 (even) */
62 /* FIELD = 1/0 - Field1 (odd)/Field2 (even) */
64 /* Active state of Sync-on-green (SoG) signal, 0/1 for LOW/HIGH respectively. */
71 /* Clock non-continuous mode support. */
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/linux-6.14.4/Documentation/devicetree/bindings/soc/samsung/
Dexynos-pmu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/soc/samsung/exynos-pmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <[email protected]>
18 - google,gs101-pmu
19 - samsung,exynos3250-pmu
20 - samsung,exynos4210-pmu
21 - samsung,exynos4212-pmu
22 - samsung,exynos4412-pmu
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/linux-6.14.4/Documentation/devicetree/bindings/soundwire/
Dqcom,soundwire.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <[email protected]>
11 - Srinivasa Rao Mandadapu <[email protected]>
19 - qcom,soundwire-v1.3.0
20 - qcom,soundwire-v1.5.0
21 - qcom,soundwire-v1.5.1
22 - qcom,soundwire-v1.6.0
23 - qcom,soundwire-v1.7.0
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/linux-6.14.4/drivers/soundwire/
Dmipi_disco.c1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 // Copyright(c) 2015-17 Intel Corporation.
5 * MIPI Discovery And Configuration (DisCo) Specification for SoundWire
47 * sdw_master_read_prop() - Read Master properties
52 struct sdw_master_prop *prop = &bus->prop; in sdw_master_read_prop()
60 device_property_read_u32(bus->dev, in sdw_master_read_prop()
61 "mipi-sdw-sw-interface-revision", in sdw_master_read_prop()
62 &prop->revision); in sdw_master_read_prop()
66 "mipi-sdw-link-%d-subproperties", bus->link_id); in sdw_master_read_prop()
68 link = device_get_named_child_node(bus->dev, name); in sdw_master_read_prop()
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/linux-6.14.4/arch/arm64/boot/dts/renesas/
Dr8a774a1-hihope-rzg2m-ex-mipi-2.1.dts1 // SPDX-License-Identifier: GPL-2.0
4 * connected with aistarvision-mipi-v2-adapter board
9 /dts-v1/;
10 #include "r8a774a1-hihope-rzg2m-ex.dts"
11 #include "hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi"
14 model = "HopeRun HiHope RZ/G2M with sub board connected with aistarvision-mipi-v2-adapter board";
15 compatible = "hoperun,hihope-rzg2m", "renesas,r8a774a1";
19 * On RZ/G2M SoC LSI V1.3 CSI40 supports only 4 lane mode.
21 * imx219 as the imx219 endpoint driver supports only 2 lane mode.
/linux-6.14.4/Documentation/devicetree/bindings/media/i2c/
Dthine,thp7312.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Paul Elder <paul.elder@@ideasonboard.com>
17 MIPI CSI-2 and parallel interfaces. It can also output on either MIPI CSI-2
18 or parallel. The hardware is capable of transmitting and receiving MIPI
23 - $ref: /schemas/media/video-interface-devices.yaml#
36 thine,boot-mode:
42 Boot mode of the THP7312, reflecting the value of the BOOT[0] pin strap.
43 0 is for the SPI/2-wire slave boot, 1 is for the SPI master boot (from
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Dovti,ov02a10.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Dongchun Zhu <[email protected]>
13 description: |-
14 The Omnivision OV02A10 is a low-cost, high performance, 1/5-inch, 2 megapixel
17 @ 1600x1200 (UXGA) resolution transferred over a 1-lane MIPI interface. The
18 sensor output is available via CSI-2 serial data output.
21 - $ref: /schemas/media/video-interface-devices.yaml#
33 clock-names:
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/linux-6.14.4/drivers/gpu/drm/i915/display/
Dvlv_dsi.c89 struct intel_display *display = to_intel_display(&intel_dsi->base); in vlv_dsi_wait_for_fifo_empty()
97 drm_err(display->drm, "DPI FIFOs are not empty\n"); in vlv_dsi_wait_for_fifo_empty()
109 for (j = 0; j < min_t(u32, len - i, 4); j++) in write_data()
125 for (j = 0; j < min_t(u32, len - i, 4); j++) in read_data()
134 struct intel_dsi *intel_dsi = intel_dsi_host->intel_dsi; in intel_dsi_host_transfer()
135 struct intel_display *display = to_intel_display(&intel_dsi->base); in intel_dsi_host_transfer()
136 enum port port = intel_dsi_host->port; in intel_dsi_host_transfer()
149 if (msg->flags & MIPI_DSI_MSG_USE_LPM) { in intel_dsi_host_transfer()
165 drm_err(display->drm, in intel_dsi_host_transfer()
172 if (msg->rx_len) { in intel_dsi_host_transfer()
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/linux-6.14.4/Documentation/admin-guide/media/
Dimx.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
20 - Video De-Interlacing or Combining Block (VDIC)
26 re-ordering (for example UYVY to YUYV) within the same colorspace, and
27 packed <--> planar conversion. The IDMAC can also perform a simple
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/linux-6.14.4/drivers/gpu/drm/tegra/
Dmipi-phy.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include "mipi-phy.h"
12 * Default D-PHY timings based on MIPI D-PHY specification. Derived from the
13 * valid ranges specified in Section 6.9, Table 14, Page 40 of the D-PHY
19 timing->clkmiss = 0; in mipi_dphy_timing_get_default()
20 timing->clkpost = 70 + 52 * period; in mipi_dphy_timing_get_default()
21 timing->clkpre = 8; in mipi_dphy_timing_get_default()
22 timing->clkprepare = 65; in mipi_dphy_timing_get_default()
23 timing->clksettle = 95; in mipi_dphy_timing_get_default()
24 timing->clktermen = 0; in mipi_dphy_timing_get_default()
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/linux-6.14.4/Documentation/devicetree/bindings/media/xilinx/
Dxlnx,csi2rxss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx MIPI CSI-2 Receiver Subsystem
10 - Vishal Sagar <[email protected]>
13 The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2
16 The subsystem consists of a MIPI D-PHY in slave mode which captures the
17 data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the
20 For more details, please refer to PG232 Xilinx MIPI CSI-2 Receiver Subsystem.
21 Please note that this bindings includes only the MIPI CSI-2 Rx controller
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/linux-6.14.4/drivers/gpu/drm/rockchip/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
20 This driver provides kernel mode setting and buffer
78 bool "Rockchip specific extensions for Synopsys DW MIPI DSI"
83 enable MIPI DSI on RK3288 or RK3399 based SoC, you should
87 bool "Rockchip specific extensions for Synopsys DW MIPI DSI2"
92 enable MIPI DSI on RK3576 or RK3588 based SoC, you should
114 support LVDS, rgb, dual LVDS output mode. say Y to enable its

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