| /linux-6.14.4/drivers/net/mdio/ |
| D | mdio-mscc-miim.c | 14 #include <linux/mdio/mdio-mscc-miim.h>
76 struct mscc_miim_dev *miim = bus->priv; in mscc_miim_status() local
79 ret = regmap_read(miim->regs, in mscc_miim_status()
80 MSCC_MIIM_REG_STATUS + miim->mii_status_offset, &val); in mscc_miim_status()
82 WARN_ONCE(1, "mscc miim status read error %d\n", ret); in mscc_miim_status()
109 struct mscc_miim_dev *miim = bus->priv; in mscc_miim_read() local
117 ret = regmap_write(miim->regs, in mscc_miim_read()
118 MSCC_MIIM_REG_CMD + miim->mii_status_offset, in mscc_miim_read()
125 WARN_ONCE(1, "mscc miim write cmd reg error %d\n", ret); in mscc_miim_read()
133 ret = regmap_read(miim->regs, in mscc_miim_read()
[all …]
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| D | Kconfig | 144 tristate "Microsemi MIIM interface support"
148 This driver supports the MIIM (MDIO) interface found in the network
|
| D | Makefile | 19 obj-$(CONFIG_MDIO_MSCC_MIIM) += mdio-mscc-miim.o
|
| /linux-6.14.4/Documentation/devicetree/bindings/net/ |
| D | mscc,miim.yaml | 4 $id: http://devicetree.org/schemas/net/mscc,miim.yaml#
7 title: Microsemi MII Management Controller (MIIM)
18 - mscc,ocelot-miim
19 - microchip,lan966x-miim
62 compatible = "mscc,ocelot-miim";
|
| /linux-6.14.4/Documentation/devicetree/bindings/mfd/ |
| D | mscc,ocelot.yaml | 54 $ref: /schemas/net/mscc,miim.yaml
58 - mscc,ocelot-miim
97 compatible = "mscc,ocelot-miim";
108 compatible = "mscc,ocelot-miim";
134 function = "miim";
|
| /linux-6.14.4/arch/arm64/boot/dts/microchip/ |
| D | sparx5.dtsi | 286 function = "miim";
291 function = "miim";
296 function = "miim";
426 compatible = "mscc,ocelot-miim";
434 compatible = "mscc,ocelot-miim";
444 compatible = "mscc,ocelot-miim";
454 compatible = "mscc,ocelot-miim";
|
| /linux-6.14.4/drivers/pinctrl/ |
| D | pinctrl-ocelot.c | 258 [FUNC_MIIM] = "miim",
560 OCELOT_P(14, MIIM, TWI_SCL_M, SFP);
561 OCELOT_P(15, MIIM, TWI_SCL_M, SFP);
664 JAGUAR2_P(56, MIIM, SFP);
665 JAGUAR2_P(57, MIIM, SFP);
666 JAGUAR2_P(58, MIIM, SFP);
667 JAGUAR2_P(59, MIIM, SFP);
776 SERVALT_P(22, MIIM, SFP, TWI2);
777 SERVALT_P(23, MIIM, SFP, TWI2);
898 SPARX5_P(52, SFP, MIIM, TWI_SCL_M);
[all …]
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| /linux-6.14.4/arch/mips/boot/dts/mscc/ |
| D | ocelot.dtsi | 231 function = "miim";
239 compatible = "mscc,ocelot-miim";
261 compatible = "mscc,ocelot-miim";
|
| /linux-6.14.4/drivers/net/dsa/microchip/ |
| D | ksz8.c | 799 * ksz8_r_phy_ctrl - Translates and reads from the SMI interface to a MIIM PHY
806 * bit values into their corresponding control settings for a MIIM PHY Control
843 * ksz8_r_phy_bmcr - Translates and reads from the SMI interface to a MIIM PHY
850 * bit values into their corresponding control settings for a MIIM PHY Basic
853 * MIIM Bit Mapping Comparison between KSZ8794 and KSZ8873
855 * MIIM Bit | KSZ8794 Reg/Bit | KSZ8873 Reg/Bit
1058 * ksz8_w_phy_ctrl - Translates and writes to the SMI interface from a MIIM PHY
1064 * This function translates control settings from a MIIM PHY Control register
1090 * ksz8_w_phy_bmcr - Translates and writes to the SMI interface from a MIIM PHY
1096 * This function translates control settings from a MIIM PHY Basic mode control
[all …]
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| /linux-6.14.4/drivers/mfd/ |
| D | ocelot-core.c | 175 .of_compatible = "mscc,ocelot-miim",
182 .of_compatible = "mscc,ocelot-miim",
|
| /linux-6.14.4/drivers/net/ethernet/freescale/ |
| D | fsl_pq_mdio.c | 3 * Freescale PowerQUICC Ethernet Driver -- MIIM bus implementation
4 * Provides Bus interface for MIIM regs
163 /* Reset the MIIM registers, and wait for the bus to free */
|
| D | xgmac_mdio.c | 204 * TSEC1 MIIM regs.
263 * TSEC1 MIIM regs.
|
| /linux-6.14.4/drivers/net/ethernet/oki-semi/pch_gbe/ |
| D | pch_gbe.h | 63 u32 MIIM; member
104 #define PCH_GBE_INT_MIIM_CMPLT 0x00010000 /* MIIM I/F Read completion */
238 /* MIIM */
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| D | pch_gbe_main.c | 464 * pch_gbe_mac_ctrl_miim - Control MIIM interface
482 if (readx_poll_timeout_atomic(ioread32, &hw->reg->MIIM, data_out, in pch_gbe_mac_ctrl_miim()
484 netdev_err(adapter->netdev, "pch-gbe.miim won't go Ready\n"); in pch_gbe_mac_ctrl_miim()
490 dir | data), &hw->reg->MIIM); in pch_gbe_mac_ctrl_miim()
491 readx_poll_timeout_atomic(ioread32, &hw->reg->MIIM, data_out, in pch_gbe_mac_ctrl_miim()
|
| /linux-6.14.4/drivers/net/ethernet/xilinx/ |
| D | ll_temac_mdio.c | 30 /* Write the PHY address to the MIIM Access Initiator register. in temac_mdio_read()
|
| D | xilinx_axienet.h | 321 #define XAE_MDIO_INT_MIIM_RDY_MASK 0x00000001 /* MIIM Interrupt */
|
| /linux-6.14.4/drivers/misc/ |
| D | lan966x_pci.dtso | 120 compatible = "microchip,lan966x-miim";
|
| D | Kconfig | 632 - lan966x-miim (MDIO_MSCC_MIIM)
|
| /linux-6.14.4/arch/arm/boot/dts/microchip/ |
| D | lan966x-kontron-kswitch-d10-mmt.dtsi | 61 miim_c_pins: miim-c-pins {
|
| D | lan966x.dtsi | 530 compatible = "microchip,lan966x-miim";
539 compatible = "microchip,lan966x-miim";
|
| /linux-6.14.4/arch/arm64/boot/dts/rockchip/ |
| D | rk3566-radxa-cm3-io.dts | 148 gmac1m0_miim: gmac1m0-miim {
|
| D | rk3588-extra-pinctrl.dtsi | 62 gmac0_miim: gmac0-miim {
|
| D | rk3568-pinctrl.dtsi | 569 gmac0_miim: gmac0-miim {
638 gmac1m0_miim: gmac1m0-miim {
705 gmac1m1_miim: gmac1m1-miim {
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| D | rk3576-pinctrl.dtsi | 640 eth0m0_miim: eth0m0-miim {
712 eth0m1_miim: eth0m1-miim {
786 eth1m0_miim: eth1m0-miim {
858 eth1m1_miim: eth1m1-miim {
|
| /linux-6.14.4/arch/arm/boot/dts/rockchip/ |
| D | rv1126-pinctrl.dtsi | 374 rgmiim1_miim: rgmiim1-miim {
|