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Searched +full:mhu +full:- +full:doorbell (Results 1 – 8 of 8) sorted by relevance

/linux-6.14.4/drivers/mailbox/
Darm_mhu_db.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013-2015 Fujitsu Semiconductor Ltd.
5 * Based on ARM MHU driver by Jassi Brar <[email protected]>
28 #define MHU_CHANS 3 /* Secure, Non-Secure High and Low Priority */
46 * struct mhu_db_channel - ARM MHU Mailbox allocated channel information
48 * @mhu: Pointer to parent mailbox device
49 * @pchan: Physical channel within which this doorbell resides in
50 * @doorbell: doorbell number pertaining to this channel
53 struct arm_mhu *mhu; member
55 unsigned int doorbell; member
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Darm_mhuv2.c1 // SPDX-License-Identifier: GPL-2.0
10 * protocol modes: data-transfer and doorbell, to be used on those channel
19 * hardware - mainly the number of channel windows implemented by the platform,
45 #define LSB_MASK(n) ((1 << (n * __CHAR_BIT__)) - 1)
46 #define MHUV2_PROTOCOL_PROP "arm,mhuv2-protocols"
94 u8 pad1[0x0C - 0x04];
99 u8 pad2[0x20 - 0x1C];
114 u8 pad[0xFC8 - 0xFB0];
124 u8 reserved0[0x10 - 0x0C];
128 u8 pad[0x20 - 0x1C];
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Darm_mhuv3.c1 // SPDX-License-Identifier: GPL-2.0
27 /* Maximum number of Doorbell channel windows */
84 #define fcgi_spt BIT(10) // MBX-only
129 /*-- MBX-only registers --*/
134 /*-- End of MBX-only ---- */
137 /*-- MBX-only registers --*/
143 /*-- End of MBX-only ---- */
252 * struct mhuv3_protocol_ops - MHUv3 operations
256 * @read_data: Read available Sender in-band LE data (if any).
257 * @rx_complete: Acknowledge data reception to the Sender. Any out-of-band data
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 on-chip processors through queued messages and interrupt driven
12 tristate "ARM MHU Mailbox"
15 Say Y here if you want to build the ARM MHU controller driver.
37 will be discovered and possibly managed at probe-time.
47 is ignored and the mailbox controller acts as a doorbell that raises
57 tristate "Platform MHU Mailbox"
61 Say Y here if you want to build a platform specific variant MHU
82 running on the Cortex-M3 rWTM secure processor of the Armada 37xx
99 This driver provides support for inter-processor communication
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/linux-6.14.4/Documentation/devicetree/bindings/mailbox/
Darm,mhu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/arm,mhu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM MHU Mailbox Controller
10 - Jassi Brar <[email protected]>
13 The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has 3
14 independent channels/links to communicate with remote processor(s). MHU links
21 The MHU hardware also allows operations in doorbell mode. The MHU drives the
22 interrupt signal using a 32-bit register, with all 32-bits logically ORed
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Darm,mhuv2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tushar Khandelwal <[email protected]>
11 - Viresh Kumar <[email protected]>
14 The Arm Message Handling Unit (MHU) Version 2 is a mailbox controller that has
15 between 1 and 124 channel windows (each 32-bit wide) to provide unidirectional
20 be written to or read from. If a pair of MHU controllers is implemented
27 An MHU controller must be specified along with the supported transport
33 - Data-transfer: Each transfer is made of one or more words, using one or more
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Darm,mhuv3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sudeep Holla <[email protected]>
11 - Cristian Marussi <[email protected]>
14 The Arm Message Handling Unit (MHU) Version 3 is a mailbox controller that
23 is composed of a MHU Sender (MHUS) containing a PostBox (PBX) block and a MHU
27 - Configure the MHU
28 - Send Transfers to the Receiver
29 - Optionally receive acknowledgment of a Transfer from the Receiver
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/linux-6.14.4/arch/arm64/boot/dts/arm/
Djuno-scmi.dtsi3 power-domains = <&scmi_devpd 8>;
7 power-domains = <&scmi_devpd 8>;
11 power-domains = <&scmi_devpd 8>;
15 power-domains = <&scmi_devpd 8>;
19 power-domains = <&scmi_devpd 8>;
23 power-domains = <&scmi_devpd 8>;
27 power-domains = <&scmi_devpd 8>;
31 power-domains = <&scmi_devpd 8>;
42 /delete-node/ scpi;
47 mbox-names = "tx", "rx";
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